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A CMOS LNA Partially Degenerated Topology Proposal Using Active Inductors

E. V. V. Cambero

Universidade Federal do ABC — UFABC, Centro de Engenharia, Modelagem e Ciências Sociais Aplicadas, Santo André, Brazil

E-mail Address: eduardo.valdes@ufabc.edu.br

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C. E. Capovilla

Universidade Federal do ABC — UFABC, Centro de Engenharia, Modelagem e Ciências Sociais Aplicadas, Santo André, Brazil

E-mail Address: carlos.capovilla@ufabc.edu.br

Corresponding author.

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I. R. S. Casella

Universidade Federal do ABC — UFABC, Centro de Engenharia, Modelagem e Ciências Sociais Aplicadas, Santo André, Brazil

E-mail Address: ivan.casella@ufabc.edu.br

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R. R. Munoz

Universidade Federal do ABC — UFABC, Centro de Engenharia, Modelagem e Ciências Sociais Aplicadas, Santo André, Brazil

E-mail Address: rodrigo.munoz@ufabc.edu.br

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, and

H. X. Araujo

Universidade Federal do Tocantins — UFT, Centro Engenharias, Arraias, Brazil

E-mail Address: hxaraujo@gmail.com

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https://doi.org/10.1142/S0218126617500785Cited by:2 (Source: Crossref)

Abstract

This paper presents the design of a CMOS low-noise amplifier (LNA) with partial inductive degeneration using active inductors in $0.35 μ$ $0.35 μ$ m technology. Both, the inductor of the partial degeneration and the load inductor, are actives. The inductors configurations are cascode with feedback resistance and Wu folded compact. The LNA has a gain of 13.2dB and a noise figure of 4.7dB at 1.8GHz. The layout has an active area of $0.17 {mm}^{2}$ $0.17 {mm}^{2}$ . The results are satisfactory, validating the compact design and demonstrating the technical feasibility of this proposed topology.

This paper was recommended by Regional Editor Piero Malcovati.

Keywords:

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