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We present an overview of radiation effects in silicon-germanium heterojunction bipolar transistors (SiGe HBT). We begin by reviewing SiGe HBTs, and then examine the impact of ionizing radiation on both the dc and ac performance of SiGe HBTs, the circuit-level impact of radiation-induced changes in the transistors, followed by single-event phenomena in SiGe HBT circuits. While ionizing radiation degrades both the dc and ac properties of SiGe HBTs, this degradation is remarkably minor, and is far better than that observed in even radiation-hardened conventional Si BJT technologies. This fact is particularly significant given that no intentional radiation hardening is needed to ensure this level of both device-level and circuit-level tolerance (typically multi-Mrad TID). SEU effects are pronounced in SiGe HBT circuits, as expected, but circuit-level mitigation schemes will likely be suitable to ensure adequate tolerance for many orbital missions. SiGe HBT technology thus offers many interesting possibilities for space-borne electronic systems.

In this paper, we propose a new circuit level hardening techniques that can decrease the sensitivity of Static Random Access Memory (SRAM) cells to radiation induced Single Event Upsets (SEUs). Five different types of 32 nm double gate (DG)-FinFET-based SRAM cells are analyzed. Proposed SRAM cell outperforms over the unhardened SRAM when exposed to radiation. This is primarily due to the modification of the source potential used to reduce the effect of SEU without affecting normal operation. Static Noise Margin (SNM), Read Noise Margin (RNM), Write Noise Margin (WNM) and Power Delay Product (PDP) are the performance metrics computed for each type of SRAM cell. Effect of back gate voltage and back gate oxide thickness variation on device characteristic show detrimental effects on radiation hardened capabilities of a device. Benchmarking is done against DICE latch and it is found that as compared to DICE latch proposed DG-FinFET SRAM has low transistor count, less area, low recovery time and fault tolerance to internal as well as external nodes.

With the need for fast and low-power radiation-hardened processors, advanced technology process is applied to obtain both high performance as well as high reliability. However, scaling down of the size of the transistor makes the transistor sensitive to outside disturbances, such as soft error introduced by the strikes of the cosmic neutron beams. Besides aerospace applications, such reliability should also be taken into consideration for the sub-100nm CMOS designs to ensure the robustness of the circuit. In such circumstances, several radiation-hardened flip-flops are designed and simulated under SMIC 40nm process. Simulation results show that with five aspects (performance, power, area, PVT variation and reliability) taken into consideration, TSPC-based DICE and TMR combined architecture has the best soft-error robustness in comparison with other radiation-hardened flip-flops, and the critical charge of such architecture is 490fC, which is 12.5X higher than the traditional unhardened flip-flop.

In this work, the impact of shallow trench isolation (STI) and dual stress liner (DSL) -induced stresses on soft error performance of 30-nm gate length Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET)-based 6T-SRAM cells is studied using process and device simulations. Under nine different stress combinations, i.e., nine different SRAMs, our simulation results show that the stresses introduced from STI and DSL enhance the soft error performance of the cells significantly.

We present an overview of radiation effects in silicon-germanium heterojunction bipolar transistors (SiGe HBT). We begin by reviewing SiGe HBTs, and then examine the impact of ionizing radiation on both the dc and ac performance of SiGe HBTs, the circuit-level impact of radiation-induced changes in the transistors, followed by single-event phenomena in SiGe HBT circuits. While ionizing radiation degrades both the dc and ac properties of SiGe HBTs, this degradation is remarkably minor, and is far better than that observed in even radiation-hardened conventional Si BJT technologies. This fact is particularly significant given that no intentional radiation hardening is needed to ensure this level of both device-level and circuit-level tolerance (typically multi-Mrad TID). SEU effects are pronounced in SiGe HBT circuits, as expected, but circuit-level mitigation schemes will likely be suitable to ensure adequate tolerance for many orbital missions. SiGe HBT technology thus offers many interesting possibilities for space-borne electronic systems.

SuperB is a novel, high luminosity (10³⁶cm⁻²s⁻¹), asymmetric e+e− collider to be built at the University of Rome Tor Vergata, Italy. A detector and its associated electronics (ETD) will be installed in this facility. High-speed serial links will be used for trigger and clock distribution and for data read-out. Given the high luminosity of the accelerator, the on-detector ends of the links will have to cope with the expected radiation levels.

In this work, we present the results of irradiation tests on some candidate components for the electrical part of the links. We performed tests with a 62-MeV proton beam at INFN Laboratori Nazionali del Sud (Catania, Italy) and with a 60Co γ-ray source at ENEA, La Casaccia (Rome, Italy).