Computer Architecture

The following sections are included:

• Preface
• Contents

This chapter is focused on the ways computers represent information in digital format. In particular, it discusses the mechanisms used to represent various quantities in a digital computer. The digital electronic circuits that are commonly used in a digital computer can assume only one of two possible values, which implies that different quantities have to be represented in a format compatible with this restriction.

Digital systems, as previously mentioned, are based on the use of electronic circuits that can, at any moment, be in one of two states. In Chapter 1, we learned how it is possible to represent various types of information using binary quantities.

This chapter presents some of the techniques used to build logic circuits that support the implementation of logic functions, i.e., electric circuits whose behaviour can be described by those functions.

Previous chapters presented methods for designing simple functions as well as their respective combinational circuits. Naturally, most circuits which are necessary for current applications display a complexity which is not compatible with such a simple approach.

This chapter will analyse a method to design complex combinational circuits from simpler models and describe the structure of most typical simple modules.

This chapter studies an important class of combinational circuits, the arithmetic circuits. For these type of circuits, the set of inputs (operands) and outputs (result) bits uses a numeric encoding. As with nearly all existing systems, this text assumes that the operands and result use the natural binary code notation, which we studied in Section 1.1, or one of its variations to enable the representation of negative values, which we will examine in this chapter. Thus, each combination of input bits is interpreted as a base-2 numeric value, and the output represents the result of a given arithmetic operation on the numeric input values.

The logic circuits presented in the previous chapters all belong to the class of combinational circuits. They are so named because each combination of values in the circuit inputs determines a unique combination of values in their outputs.

This chapter analyses new elemental logic devices, which enable the controlled storage of information about logic values which have previously occurred. These elements are known as memory elements, and the logic circuits that include them are called sequential circuits. As the name indicates, sequential circuits react to the occurrence of sequences in their inputs. They consider previous values at the inputs, while combinational circuits are only able to identify, at any time, combinations of inputs present at that time. Section 6.1 analyses the different behaviour of these two types of circuits.

As we saw in previous chapters, combinational circuits compute a value at their output that depends only on the value present in the inputs at that moment. They are different from sequential circuits, whose output values depend on a sequence of values in the inputs.

The techniques for designing both combinational and sequential digital circuits presented in the previous chapters make possible the implementation of systems of small and medium complexity. The level of detail to which these techniques are applied is too high to use them in the design of large-sized circuits. Thus, when developing systems with a more complex functionality, we need a higher level of abstraction, to hide many details and make the problem manageable…

Although we may design a digital system for any particular function from scratch, connecting registers and functional blocks, using the technique studied in Chapter 8, for reasons of flexibility it is preferable to have an adaptable and easily reprogrammable system, a computer. This chapter provides a summary of the development of computers and their internal organisation.

This chapter studies some possible alternatives for the instruction set architecture or ISA of a processor. The choice of the instructions to be included in the instruction set for a processor represents a complex problem, which depends also on the features and the technology to be used. Specialised design teams, the instruction set architects, solve this issue after carrying out an analysis of the existing alternatives and the limitations imposed by the specifications.

The previous chapter introduced the concept of assembly language and, in particular, the set of assembly instructions for the P3 processor. We will now consider briefly some design techniques for the development of programs based on these instructions. Assembly language is much more limited than high-level languages, particularly regarding the parameters accepted by the instructions. Because of this, developing programs in this language is more challenging and tends to be a slower process. The use of assembly programming methods is therefore of major importance.

The instruction set architecture of the P3 processor was described in Chapter 10. The instruction set architecture defines the visible interface for the programmer, specifying the instructions which are available, as well as the internal registers, the memory access modes and other important characteristics of the processor.

For a given instruction set architecture there are many possible implementations for the structure of the processor. The numerous possible implementations result from a large number of choices which are available to the digital systems designer and involve different compromises between the number of clock cycles necessary to execute each instruction, the maximum clock frequency possible for the system and the area occupied in silicon for the physical implementation of the processor.

This chapter provides a detailed description of a possible implementation of the P3 processor, as well as the various compromises which are inherent to the choices made, focusing, when considered opportune, on the most obvious alternatives and reasons for why they have been put aside in favour of the described implementation.

In previous chapters, we examined the operation of a processor, modelling the memory as a set of registers, each of which individually addressable. This simplistic view does not correspond to reality, except in very simple systems, but it allowed us to describe the operation of the processor without taking into account the complexities of the memory system. In particular, any current computer, whether an embedded system, a personal computer, a server or a portable device, uses numerous devices for data storage. These devices belong to two major classes: primary memory and secondary memory.

The primary memory, more frequently known as main memory, built with integrated circuits, has a shorter access time, but is more expensive (per bit), and has a smaller capacity than the secondary memory. Besides that, it does not have the capability to hold data when the system is not powered.

Secondary memory, also known as auxiliary memory, uses devices based on magnetic (disks and magnetic tape) or optical (CD-ROM and DVD) technology and is slower, but has a lower cost per bit, a greater capacity and the possibility of holding stored data even when the computer is not powered. More recently flash memories started to be used in solid-state drives (SSD) to substitute magnetic disks. Secondary memory may be used by the processor when executing programs, through the use of the virtual memory system. The secondary memory is also used to store data in file systems. This organisation of secondary storage will not be studied in this chapter since it implies knowledge of operating systems which goes beyond the scope of an introductory book.

This chapter will analyse the memory system of a computer, starting in Section 13.1 with the organisation of its main memory, which, in some simple systems, is the only form of data storage. More complex systems have additional components, arranged in an hierarchic structure (see Section 13.2) and will be studied in the following sections. In particular in Section 13.3, we will study cache systems, which aim at speeding up access to the primary storage, and Section 13.4 will focus in virtual memory systems, which make possible the transparent use of secondary storage as if it was main memory, by the processor.

The previous chapters defined two of the main components of the computer, the central processing unit and the memory system. Although all the processing is carried out between these two units, this would be of reduced usefulness if there was not some way of interacting with the external world which would firstly allow the introduction of the data to be processed and, secondly, make results accessible.

In early computers, this interface was rudimentary. Inputs were specified by switches which defined their value bit by bit, and the result was visualised in lamps which also indicated their value at the bit level. Since then there has been considerable evolution not only in human-machine interfaces but also in interfaces between different machines. The development of new forms of interaction with computers and other digital devices is a subject of increasingly intense research.

The term peripheral is frequently used generically to designate the input and output devices of a computer. With the advance of technology, the complexity of peripherals has systematically increased to the point where it is sometimes difficult to make a clear distinction between peripherals and processing units. The current concept of peripheral, ranges from relatively simple units, such as a keyboard or a mouse, up to very complex units, which themselves provide significant computational power, such as monitors, hard disks or touch screen interfaces. The interaction mechanisms for each peripheral are very diverse and are responsible for a significant part of the complexity of current operating systems. Some peripherals, such as hard disks, have very tight response time requirements since they send data at very high speeds to the central processing unit. Others, such as a keyboard, have much less demanding requirements, and the processor can execute many millions of operations between each interaction with the device. Note that disks may be considered part of the memory system but, considering the way they interact physically with the processors, they are also considered peripherals.

At the introductory level which is the goal of this text, we assume a simplified form of interaction, in which access to the different peripherals has the same access protocol as the access to a memory location (Section 6.8). Since the protocol is the same, it does not matter to the processor whether it is accessing a memory location or a peripheral, and this makes it possible to map the different peripherals into the memory space of the processor (Section 14.1). This simplification implies the presence of an interface circuit in each peripheral which converts information coming from the device to the protocol used for memory access.

This simplified form of interaction is representative of real situations, although there are various additional complications which are only possible to deal with in a more advanced study of specific architectures.

This chapter starts by discussing aspects of the input/output architecture in Section 14.1. The operation of some of the most well known simple peripherals is described in Section 14.2. It will then present in Sections 14.3 and 14.4 the different forms of communication between the computer and these devices. The interruption system is discussed in Section 14.5. Finally, in Section 14.6 it will consider different ways to transfer information with peripherals at different transmission rates.

The previous chapters considered the fundamental concepts of computer architecture from a perspective of increasing system complexity.

After analysing the binary number system and elementary logic gates, we studied combinational circuits and increasingly sophisticated sequential circuits. Chapter 12 began the study of computer architectures. That chapter presents a possible internal structure for an implementation of the P3 processor instruction set, based on a microprogrammed control unit and in a datapath which included a register file, an arithmetic logic unit and the main memory as building blocks. Chapters 13 and 14, are devoted to the study of memory and input/output systems, external modules connected to the central processing unit, which are an integral part of a computer.

The following sections are included:

• P3 Instruction Set
  • Registers
  • Status Bits
  • Memory
  • Inputs/Outputs
  • Interrupts
  • Instruction Set
  • AddressingModes
• P3 Implementation
  • Assembler
  • Peripherals
    • Interrupt buttons
    • Input and output devices
  • P3 Card
  • Simulator

The following sections is included:

• Index