Quantum Dot Gate (QDG) FETs to Fabricate n-MOS Inverters Exhibiting 3-State Logic
This paper presents the experimental characteristics of 3-state n-MOS inverters utilizing Quantum Dot Gate (QDG) FETs. By employing FETs that have quantum dots in the gate region, particularly Si-SiOx cladded quantum dots and Ge-GeOx cladded quantum dots, intermediate states were observed in both variations of the device, both of which using the same architecture and mask set.