No Access

PERFORMANCE OF MOSFETs ON REACTIVE-ION-ETCHED GaN SURFACES

KE TANG

Center for Integrated Electronic, Rensselaer Polytechnic Institute, Troy, NY 12180, USA

Search for more papers by this author

WEIXIAO HUANG

Center for Integrated Electronic, Rensselaer Polytechnic Institute, Troy, NY 12180, USA

Present Address: Freescale Semiconductor, Tempe, AZ 85284, USA.

Search for more papers by this author

, and

T. PAUL CHOW

Center for Integrated Electronic, Rensselaer Polytechnic Institute, Troy, NY 12180, USA

Search for more papers by this author

https://doi.org/10.1142/S0129156409006163Cited by:1 (Source: Crossref)

Abstract

We have fabricated, characterized and compared the performance of lateral enhancement-mode GaN MOSFETs on as-grown and RIE-etched surfaces with 900 and 1000°C gate oxide annealing temperatures. Both subthreshold swing and field effect mobility show 1000°C is the optimal annealing temperature for the PECVD gate oxide in our MOSFET process.

Keywords:

Remember to check out the Most Cited Articles!
Check out these Notable Titles in Antennas

References

W. Huanget al., Enhancement-mode GaN Hybrid MOS-HEMTs with Ron,sp of 20 mΩ-cm 2, Proc. Int. Symp. Power Semicond. Devises ICs (2008) pp. 295–298. Google Scholar
W. Huang, T. Khan and T. P. Chow, J. Electronic Materials 35, 726 (2006), DOI: 10.1007/s11664-006-0129-6. Crossref, Web of Science, Google Scholar
W. Huang, T. Khan and T. P. Chow, IEEE Electron Device Lett. 27(10), 796 (2006), DOI: 10.1109/LED.2006.883054. Crossref, Web of Science, Google Scholar
W. Huang and T. P. Chow, Monolithic High-Voltage GaN MOSFET/Schottky Pair with Reverse Blocking Capability, Proc. Int. Symp. Power Semicond. Devises ICs (2007) pp. 265–268. Google Scholar
K. Tang, W. Huang, and T. P. Chow, "GaN MOS Capacitors and FETs on Plasma-Etched GaN Surfaces", accepted by J. Electronic Materials . Google Scholar