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This paper presents the development of microwave Gallium nitride (GaN) heterostructure field-effect transistors (HFETs) on silicon (Si). GaN-on-Si provides a low-cost manufacturable platform that could lead to the commercialization of GaN-based power devices for wireless applications. Small periphery GaN high electron mobility transistors (HEMTs) on Si exhibited a maximum drain current of 900mA/mm, a peak g_m of 300 mS/mm, and a microwave output power density of 1.5 W/mm at 2 GHz. Microwave characterization and device modeling of GaN HEMTs on Si are discussed.

The types of applications affected by radiation effects in III-V devices have significantly changed over the last four decades. For most applications III-V ICs have provided sufficient radiation hardness. Some expectations for hardened soft error applications did not materialize until much later. Years of research defined that not only material properties, but device structures, layout practices and circuit design influenced how III-V devices were susceptible to certain radiation effects. The highest performance III-V ICs due to their low power-speed energy products will provide challenges in ionizing radiation environments from sea level to space.

Maskless pendeo-epitaxy involves the lateral and vertical growth of cantilevered "wings" of material from the sidewalls of unmasked etched forms. Gallium Nitride films grown at 1020°C via metalorganic vapor phase epitaxy on GaN/AlN/6H-SiC(0001) substrates previously etched to form -oriented stripes exhibited similar vertical [0001] and lateral growth rates, as shown by cross-sectional scanning electron microscopy. Increasing the temperature increased the growth rate in the latter direction due to the higher thermal stability of the surface. The surface was atomically smooth under all growth conditions with a root mean square (RMS)=0.17 nm. High resolution X-ray diffraction and atomic force microscopy of the pendeo-epitaxial films confirmed transmission electron microscopy results regarding the significant reduction in dislocation density in the wings. This result is important for the properties of both optoelectronic and microelectronic devices fabricated in III-Nitride structures. Measurement of strain indicated that the wing material is crystallographically relaxed as evidenced by the increase in the c-axis lattice parameter and the upward shift of the E2 Raman line frequency. A strong D°X peak at 3.466 eV was also measured in the wing material. However, tilting of the wings of ≤0.15° occurred due to the tensile stresses in the stripes induced by the mismatch in the coefficients of thermal expansion between the GaN and the underlying substrate.

Gallium nitride films of increasing thickness have been grown on either AlN or AlGaN substrates. The state of stress of these biaxially stressed layers gradually changed from compression to tension with regard to both their average strain and their local strain along the [0001] growth direction. The components of both the compressive and tensile stresses are caused by the mismatch in lattice parameters between the GaN and the buffer layer and the mismatch in the coefficients of thermal expansion between GaN and SiC, respectively. The compressive stress is partially relieved within the first 20 nm in the GaN film grown on the AlN buffer layer. The relief of the remaining stress follows an exponential dependence on the thickness of the GaN layer with values for the characteristic decay length of 0.24 μm and 0.64 μm for the AlN and AlGaN buffer layer, respectively. The relaxation mechanism is discussed in terms of the formation of misfit dislocations via surface undulations.

The essential steps required to create thick GaN films and seed crystals for bulk crystal growth are described. These include the growth of low dislocation density GaN films by hydride vapor phase epitaxy and the separation of films from their growth substrates. Also addressed are issues of processing thin and thick films to create compliant layer substrates for thick film HVPE growth and chemical mechanical polishing methods to enhance surface morphology and remove material damage free. Growth of both gallium and nitrogen polar films is discussed with key issues identified regarding polarity inversion during growth and impurity incorporation along the -c growth direction. These are illustrated with examples that emphasize the growth of material with low threading dislocation density.

The cracking of GaN films and the associated cracking of substrates are described. The geometry, structure, and evolution of fracture demonstrate that GaN films crack under tensile stress during growth and are subsequently overgrown and partially healed. The film cracks channel along the (1010)_GaN planes and also extend a distance of ~5 μm into the sapphire substrate. These incipient cracks in the substrate form a set of initial flaws that leads to complete fracture through the sapphire during cooling for sufficiently thick films. Each stage of this cracking behavior is well described by a fracture mechanics model that delineates a series of critical thicknesses for the onset of cracking that are functions of the film and substrate stresses, thicknesses, and elastic properties. Similar cracking behavior is found to occur independently of the choice of substrate between sapphire and SiC and is traced to a tensile stress generation mechanism early in the growth process, such as that provided by island coalescence. Cracking is the dominant stress relief mechanism, as opposed to dislocation generation or diffusion, because of the island growth mode and because of optimized growth temperatures at or below the brittle-to-ductile transition. Lateral epitaxial overgrowth (LEO) of GaN is shown to minimize substrate fracture even though film cracking remains unaffected. This effect explained in terms of the limits placed on the initial extent of insipient substrate cracks due to the LEO geometry.

The direct bonding method is applied to the GaN/SiC system, and the processing conditions for successful direct bonding are clarified. Direct bonding of GaN/SiC is achieved at 900°C. The direct bonding of GaN to Si-face SiC is very dependent on the choice of chemical treatments but the bonding of GaN to C-face SiC is less dependent on surface preparation. It is found that an oxide-cleaned surface is essential to achieve good reproducibility of bonding. The electrical properties of the bonded interfaces are also characterized. If a native oxide is present when the bonded interface is prepared, the current through the interface is decreased, which is attributed to an energy barrier due to the presence of charged interface states. Cross section transmission electron microscopy indicates 10nm spaced dislocations at the interface, which form to accommodate the lattice mismatch and twist misfit. In some regions an amorphous oxide layer forms at the interface, which is attributed to inadequate surface preparation prior to bonding. Directly bonded GaN/SiC heterojunction diodes have been fabricated and characterized. The Ga-face (0001) n-type 2H GaN films were directly bonded to the Si-face or C-face (0001, 000-1) p-type 6H SiC. The I-V characteristics display diode ideality factors, saturation currents and energy barrier heights of 1.5±0.1, 10^-13A/cm², 0.75±0.10 eV for the Ga/Si interface and 1.2±0.1, 10^-16A/cm², 0.56±0.10 eV for the Ga/C interface. The built-in potential was determined from capacitance-voltage measurements to be 2.11±0.10 eV and 2.52±0.10 eV for the Ga/Si interface and the Ga/C interface, respectively. From the built-in potential the energy band offsets are determined to be ΔE_C=0.87±0.10 eV and ΔE_V=1.24±0.10 eV for the Ga/Si interface and ΔE_C=0.46±0.10 eV and ΔE_V=0.83±0.10 eV for the Ga/C interface.

The characteristics of clean n- and p-type GaN (0001) surfaces and the interface between this surface and SiO₂, Si₃N₄, and HfO₂ have been investigated. Layers of SiO₂, Si₃N₄, or HfO₂ were carefully deposited to limit the reaction between the film and clean GaN surfaces. After stepwise deposition, the electronic states were measured with x-ray photoelectron spectroscopy (XPS) and ultraviolet photoemission spectroscopy (UPS). A valence band offset (VBO) of 2.0±0.2 eV with a conduction band offset (CBO) of 3.6±0.2 eV was determined for the GaN/SiO₂ interface. The large band offsets suggest SiO₂ is an excellent candidate for passivation of GaN. For the GaN/Si₃N₄, interface, type II band alignment was observed with a VBO of -0.5±0.2 eV and a CBO of 2.4±0.2 eV. While Si₃N₄ should passivate n-type GaN surfaces, it may not be appropriate for p-type GaN surfaces. A VBO of 0.3±0.2 eV with a CBO of 2.1±0.2 eV was determined for the annealed GaN/HfO₂ interface. An instability was observed in the HfO₂ film, with energy bands shifting ~0.4 eV during a 650°C densification anneal. The electron affinity measurements via UPS were 3.0, 1.1, 1.8, and 2.9±0.1 eV for GaN, SiO₂, Si₃N₄, and HfO₂ surfaces, respectively. The deduced band alignments were compared to the predictions of the electron affinity model and deviations were attributed to a change of the interface dipole. Interface dipoles contributed 1.6, 1.1 and 2.0±0.2 eV to the band alignment of the GaN/SiO₂, GaN/Si₃N₄, and GaN/HfO₂ interfaces, respectively. It was noted that the existence of Ga-O bonding at the heterojunction could significantly affect the interface dipole, and consequently the band alignment in relation to the GaN.

The use of AlGaN/GaN HEMTs and HBTs for switching power supplies is explored. With its high electron velocities and breakdown fields, GaN has great potential for power switching. The field-plate HEMT increased breakdown voltages by 20% to 570V by reducing the peak field at the drain-side edge of the gate. The use of a gate insulator is also investigated, using both JVD SiO₂ and e-beam evaporated SiO₂ to reduce gate leakage, increasing breakdown voltages to 1050V and 1300V respectively. The power device figure of merit (FOM) for these devices: , is the highest reported for switching devices. To reduce trapping effects, reactively sputtered SiN_x, is used as a passivant, resulting in a switching time of less than 30 ns for devices blocking over 110V with a drain current of 1.4A under resistive load conditions. Dynamic load results are also presented.

The development of HBTs for switching applications included the development of an etched emitter HBT with a selectively regrown extrinsic base. This was later improved upon with the selectively regrown emitter devices with current gains as high as 15. To improve breakdown in these devices, thick GaN layers were grown, reducing threading dislocation densities in the active layers. A further improvement included the use of a bevelled shallow etch and a lateral collector design to maximize device breakdown.

We describe the fabrication of the CAVET (Current Aperture Vertical Electron Transistor) by Photoelectrochemical (PEC) formation of a current aperture. Etch process is quite naturally critical to the achievement of the etched aperture in CAVET. We provide some background on that etch process, and the subsequent modification and optimization of the process for CAVET fabrication.

We discuss the first reported device characteristics of a wafer-fused heterojunction bipolar transistor (HBT), demonstrating the potential of wafer fusion for the production of electrically active heterostructures between lattice-mismatched materials. n-GaAs/n-GaN ("n-n") and p-GaAs/n-GaN ("p-n") heterojunctions were successfully fused and processed into current-voltage (I-V) test structures. The fusion and characterization of these simple structures provided insight for the fabrication of the more complicated HBT structures. Initial HBT devices performed with promising dc common-emitter I-V characteristics and Gummel plots. n-n, p-n, and HBT electrical performance was correlated with systematically varied fusion conditions, and with the quality of the fused interface, given both chemical information provided by secondary ion mass spectroscopy (SIMS) and structural information from high resolution transmission electron microscopy (HRTEM) analysis.

III-Nitride Metal-Oxide-Semiconductor Heterojunction (MOSH) structure consists of a thin dielectric layer deposited on top of a semiconductor heterostructure with a 2D electron gas at the heterojunction interface. MOSH structures are the key components for high-power low-loss, fast RF switches. The paper discusses two types of high-power switches using III-Nitride MOSH structures. The first type uses the MOSH structure as the gate region of an AlGaN/GaN HFET. The second type uses MOSH structure as a switching capacitor. In the 2GHz - 10 GHz frequency range, switching powers from 20 to 60 W/mm have been achieved with the insertion loss below 1 dB.

In this paper, we discuss requirements of power devices for automotive applications, especially hybrid vehicles and the development of GaN power devices at Toyota. We fabricated AlGaN/GaN HEMTs and measured their characteristics. The maximum breakdown voltage was over 600V. The drain current with a gate width of 31mm was over 8A. A thermograph image of the HEMT under high current operation shows the AlGaN/GaN HEMT operated at more than 300°C. And we confirmed the operation of a vertical GaN device. All the results of the GaN HEMTs are really promising to realize high performance and small size inverters for future automobiles.

This paper presents Freescale's baseline GaN device technology for wireless infrastructure applications. At 48 V drain bias and 2.1 GHz operating frequency 10-11 W/mm, 62-67% power-added efficiency (PAE) is realized on 0.3 mm devices and 74 W (5.9 W/mm), 55% PAE is demonstrated for 12.6 mm devices. A simple thermal model shows that a more than twofold increase in channel temperature is responsible for limiting the CW power density on the 12.6 mm compared to 0.3 mm devices. The addition of through wafer source vias to improve gain and tuning the device in a fixture optimized for efficiency yield an output power of 57W (4.7 W/mm), PAE of 66%, and a calculated channel temperature of approximately 137°C at a 28 V bias.

Additional friction due to Pauli constraint, channel self-heating, alloy scattering, and hot phonons is reconsidered.

In this paper, we have fabricated and compared the performance of lateral enhancement-mode GaN MOSFETs with linear and circular geometries. Circular MOSFETs show 2 to 4 orders of magnitude lower leakage current than that of linear MOSFETs. We also studied short channel behaviors and found that they are similar to those previously reported Si MOSFET.

Optical properties of green emission Ga_0.80In_0.20N/GaN multi-quantum well and light emitting diode have been investigated by using photoluminescence, cathodoluminescence, electroluminescence, and photoconductivity. The temperature dependent photoluminescence and cathodoluminescence studies show three emission bands including GaInN/GaN quantum well emission centered at 2.38 eV (~ 520 nm). The activation energy of the non-radiative recombination centers was found to be ~ 60 meV. The comparison of photoconductivity with luminescence spectroscopy revealed that optical properties of quantum well layers are strongly affected by the quantum-confined Stark effect.

A significant improvement of contact transfer resistance on undoped GaN/AlGaN/AlN (10 Å)/GaN high electron mobility transistor (HEMT) structure was demonstrated using a Ta/Ti/Al/Mo/Au metallization scheme compared to a Ti/Al/Mo/Au metallization scheme. A contact resistance as low as 0.16 ± 0.03 ohm-mm was achieved by rapid thermal annealing of evaporated Ta (125 Å)/Ti (150 Å)/Al (900 Å)/Mo(400 Å)/Au(500 Å) metal contact at 700 °C for 1 min followed by 800 °C for 30 sec in a N₂ ambient. An excellent edge acuity was also demonstrated for the annealed Ta/Ti/Al/Mo/Au ohmic contacts.

Time-resolved photoluminescence studies of nitride semiconductors and ultraviolet light emitters comprised of these materials are performed as a function of pump intensity as a means of understanding and evaluating device performance. Comparison of time-resolved photoluminescence (TRPL) on UV LED wafers prior to fabrication with subsequent device testing indicate that the best performance is attained from active regions that exhibit both reduced nonradiative recombination due to saturation of traps associated with point and extended defects and concomitant lowering of radiative lifetime with increasing carrier density. Similar behavior is observed in optically pumped UV lasers. Temperature and intensity dependent TRPL measurements on a new material, AlGaN containing nanoscale compositional inhomogeneities (NCI), show that it inherently combines inhibition of nonradiative recombination with reduction of radiative lifetime, providing a potentially higher efficiency UV emitter active region.

We describe a new analytical model of a Heterostructure Field Effect Transistors (HFETs) that accounts for electron trapping in the gate-drain spacing of the device and for related non-ideal device behavior. Under conditions of a very strong trapping, the electron velocity saturates outside the gate, in the trapping region, and the negative trapped charge leads to relatively large differential output conductance at the drain voltages exceeding the knee voltage. Also under the conditions of severe trapping, the negative trapped charge leads to the positive offset of the output current-voltage (I-V) characteristic. The model describes quite well numerous experimental data for passivated and unpassivated AlGaN/GaN HFETs with and without field plates (FP) under different bias conditions.