Special Issue on IEEE International Conference of Electron Devices and Solid-State Circuits; Guest Editor: Jianguo MaNo Access

A CMOS LOW-POWER TEMPERATURE-ROBUST RSSI USING WEAK-INVERSION LIMITING AMPLIFIERS

KEPING WANG

VIRTUS, IC Design Centre of Excellence, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore

Department of Electrical Engineering, University of Washington, Seattle, Washington 98195, USA

Corresponding author.

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XUEMEI LEI

College of Electronic Information Engineering, Inner Mongolia University, Hohhot, Inner Mongolia, China

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KAIXUE MA

VIRTUS, IC Design Centre of Excellence, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore

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KIAT SENG YEO

VIRTUS, IC Design Centre of Excellence, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore

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XIANG CAO

Institute of RF- & OE-ICs, Southeast University, 2 Sipailou, Nanjing 210096, China

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, and

ZHIGONG WANG

Institute of RF- & OE-ICs, Southeast University, 2 Sipailou, Nanjing 210096, China

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https://doi.org/10.1142/S0218126613400343Cited by:5 (Source: Crossref)

Abstract

This paper presents a low-power CMOS receiving signal strength indicator (RSSI). The main architecture of the circuit adopts a six-stage limiting amplifier (LA) in a logarithmic-linear form, which shows a good performance in weak signal detection. The RSSI achieves high tolerance to process, voltage, and temperature (PVT) variations by utilizing the unique nature of branch currents in a transconductance amplifier. The power consumption is decreased by using the weak-inversion LAs. Full-waveform current rectification and summation are employed in the RSSI circuit to achieve high precision while maintaining low power consumption. Measured results show that in the 1 kHz–50 MHz frequency range, the input dynamic range is wider than 70 dB within ±2 dB linearity error. The chip occupies an area of 0.7 mm² × 0.3 mm² using a 0.18-μm CMOS. It draws 1.3 mA from a 1.8 V supply.

Keywords:

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