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An Improved Comparator Based on Current Reuse and a New Frequency Compensation Technique used in an OTA for Pipeline ADCs

    https://doi.org/10.1142/S0218126621502145Cited by:1 (Source: Crossref)

    In this paper, a comparator and an operational amplifier considered as essential components, constituting a 10-bit 50-MHz pipeline Analog-to-Digital Converter for Wireless Local Area Network (WLAN) applications, are described and designed. All post-layout and Monte-Carlo simulations, using a 0.35μm CMOS AMS process technology with 3.3V supply voltage and an input common-mode range of 1.152.15V, are achieved. An improved clocked comparator with a dynamic latch, based on a switched capacitor network, using the current reuse technique for slew rate enhancement and positive feedback for offset voltage compensation, is presented. The operational amplifier, consisting of a fully differential folded cascode operational transconductance amplifier, providing high-gain and good stability, is exhibited. A new frequency compensation technique, based on active resistors, is used to improve amplifier phase-margin. The Monte-Carlo performance results of the designed clocked comparator provide an offset voltage of 32.32mV with 2.49mV 3σ deviation, a slew rate of 8.29V/ns with 0.45V/ns 3σ deviation, and a propagation delay of 4.16ns with 0.15ns 3σ deviation. Monte-Carlo performance results of the designed operational amplifier provide a phase-margin of 63.01, and a high-gain of 79.22dB with 1.92 and 4.86dB 3σ, respectively, by using 1pF load capacitance.

    This paper was recommended by Regional Editor Piero Malcovati