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The 3D simulation of clothing design (3DS) is the process of textile fabrics that requires efficient mechanical simulation models to replicate their nonlinear mechanical properties. Developing 3D digital models allows pattern designers to inspect and experiment with them before creating physical prototypes. The main challenge comes from the multifunctionality of clothing simulation attributes. Computer-aided design (CAD) software enables designers to draw ideas, create patterns, model clothing, and customize according to specific body types and needs. The potential of CAD in fashion design makes design more inclusive and ecologically responsible. Therefore, in the proposed method, 3D simulation-assisted computer-aided design (3DS-CAD) has been used by manufacturers. Compared with traditional 3D manual pattern development, manufacturers can simulate the fit and behavior of clothing in a virtual environment, enhance visualization, and accelerate design iteration. CAD system is a software that helps create textile components, such as printed surface patterns and clothing. This system uses specialized computer software to generate, modify, analyze, and optimize designs. This program improves the efficiency of fashion designers by enhancing design quality. With the help of modern technologies such as 3D body scanners and virtual clothing simulation software, it is ensured that clothing perfectly fits the virtual human model in 3D space. Due to the trend of customization, clothing manufacturing can be completed faster and more accurately.

This paper presents an application of rule-based expert systems to thermal and structural analysis, part of mechanical engineering design, in electronic system design. The purpose of these expert systems is to serve as a consultant or design reviewer. These design expert systems are capable of performing both symbolic reasoning and numeric computation. The advantages of expert systems over conventional systems such as user friendliness, explanation and help facilities, and easy development and maintenance are also shown in this paper. Using system-subsystem tree structure several interrelated expert systems can be integrated into one system, and it is flexible for future expansion or modification. Object-oriented approach is also discussed, which with its unique representation of object could be a useful tool for engineering design.

Advances in VLSI technology make it possible to realize systems of very high complexity in a small volume of hardware using integration. In many application fields, it is necessary to implement certain algorithms, or even complete information processing systems, directly in silicon. Application domains which are likely to benefit are in the fields of signal processing and scientific computing.

In this paper, we consider several steps which we believe to be essential in the design path of a special purpose architecture, and we present methodologies for achieving design requirements. These solutions are based on experience gathered in the Parallel VLSI Architecture group of IRISA.

Traditionally, magnetic component design has been based on power frequency transformers with sinusoidal excitation. However, the movement towards higher density integrated circuits means that reductions in the size of magnetic components must be achieved by operating at higher frequencies, mainly through nonsinusoidal switching circuits. As this trend continues, computing tools are required to carry out designs of magnetic components that also allow evaluation of the high frequency losses in these components. A computer design package is described here that implements a robust transformer design methodology allowing customizable transformer geometries. The concept of a critical frequency is a vital part of this methodology. In addition, the winding choice at high frequencies is optimized to give the most accurate results for the best possible speed. This paper includes a description of the software design processes used and describes the main aspects that were incorporated into the system.

The analog-integrated circuits industry is exerting increasing pressure to shorten the analog circuit design time. This pressure is put primarily on the analog circuit designers that in turn demand automated circuit design tools evermore vigorously. Such tools already exist in the form of circuit optimization software packages but they all suffer a common ailment — slow convergence. Even taking into account the increasing computational power of modern computers the convergence times of such optimization tools can range from a few days to even weeks. Different authors have tried diverse approaches for speeding up the convergence with varying success. In this paper authors propose a combined optimization algorithm that attempts to improve the speed of convergence by exploiting the positive properties of the underlying optimization methods. The proposed algorithm is tested on a number of test cases and the convergence results are discussed.

Nowadays, power is a dominant factor that constrains highly integrated hardware-systems designs. The implied problems of high power density, causing chip overheating, or limited power source in modern Internet-of-Things devices are most commonly dealt with the use of the dynamic power management. This method enables to use power-reduction techniques, such as clock gating, power gating, or voltage and frequency scaling. Since the adoption of power management is quite difficult in modern complex systems, there are new approaches evolving intended to simplify power-constrained systems design. We have also proposed such an approach, utilizing the system level of design abstraction and increased automation in the design process. In this paper, the proposed hybrid verification approach is described that represents an integral part of the suggested design methodology. It consists of formal and informal techniques, enabling the verification process to begin at the very early specification stage of the system development. Our approach helps a designer to create correct and consistent power-management specification and verifies whether the specified power intent is preserved after design refinement. The continuous automated verification steps can quickly find errors at early design stages and thus reduce the amount of design re-spins, which speeds-up the overall development process.

Despite its important existing challenges, quantum-dot cellular automata (QCA) is one of the promising replacement candidates of the traditional VLSI technology. Practical implementation issues such as fault tolerance and lack of customized CAD tools and algorithms for automatic synthesis of large complex systems are some important instances of QCA circuit design challenges. Currently, most of the research papers focus only on development of individually efficient QCA gates and circuits in terms of only their physical properties such as area and delay. However, throughout this paper, it is demonstrated that these compressed and fast individual QCA gates and circuits cause serious concerns when they are exploited as building blocks in modular design of higher level complex circuits. Some simple but effective design rules are then emphasized to solve this problem by preserving the “modular design efficiency” of the developed underlying QCA gates and circuits. As a case study, two new instances of fault-tolerant QCA XOR gates are introduced which are designed by simultaneously considering both area/delay and modular design efficiency rules. A wide range of numerical experiments are provided throughout the paper to prove the priority of the proposed gates with respect to eight other samples of the most efficient existing XOR structures, when exploiting them to build more complex circuits such as adders and error detection/correction circuits.

Form features may be represented both as faces and as volumes. Feature volumes are necessary in automated process planning for relating a feature to the extent of material to be removed from a part, and for capturing the global characteristics of a part, such as tool accessibility. In this paper, a method will be presented for generating a feature volume from a set of feature faces, based on the technique of face extension. The implementation is currently limited to polyhedral parts. Examples will be given to illustrate the algorithm.

A robust and efficient surface intersection algorithm that is implementable in floating point arithmetic, accepts surfaces algebraic or otherwise and which operates without human supervision is critical to boundary representation solid modeling. To the author's knowledge, no such algorithms has been developed. All tolerance-based subdivision algorithms will fail on surfaces with sufficiently small intersections. Algebraic techniques, while promising robustness, are presently too slow to be practical and do not accept non-algebraic surfaces. Algorithms based on loop detection hold promise. They do not require tolerances except those associated with machine associated with machine arithmetic, and can handle any surface for which there is a method to construct bounds on the surface and its Gauss map. Published loop detection algorithms are, however, still too slow and do not deal with singularities. We present a new loop detection criterion and discuss its use in a surface intersection algorithms. The algorithm, like other loop detection based intersection algorithms, subdivides the surfaces into pairs of sub-patches which do not intersect in any closed loops. This paper presents new strategies for subdividing surfaces in a way that causes the algorithms to run quickly even when the intersection curve(s) contain(s) singularities.

Much has been published on the topic of design optimization of mechanical components. Most of the research has concentrated on the finite element or boundary element part of the problem. Little effort has been applied to integrating design optimization with CAD. With the introduction of parametric and variational CAD, it is more desirable than ever to merge these technologies, i.e., to perform the analysis directly on the CAD geometry and to use the CAD parameters/dimensions as design variables. In this paper, one part of the problem is examined, the calculation of geometric sensitivities on variational CAD geometry. It is shown that for a well-conditioned set of constraint equations, the geometric sensitivities are easily obtained by a straight-forward application of the implicit function theorem. When the constraint equations become singular, the situation is more complex. The nature of singularities is explored, and a method, based on rational transformations that are common in algebraic curve tracing, is suggested to resolve singular points. It is shown that the geometric sensitivity is a natural by-product of the transformation. The paper concludes with some symbolic algebra software, a Mathematica package, that was found to be useful in the investigation.

This paper presents a unified approach for incorporating free-form solids in bilateral Brep and CSG representation schemes, by resorting to low-degree (quadratic, cubic) algebraic surface patches. We develop a general CSG solution that represents a free-form solid as a boolean combination of a direct term and a complicated delta term. This solution gives rise to the trunctet-subshell conditions, under which the delta term computation can be obviated. We use polyhedral smoothing to construct a Brep consisting of quadratic algebraic patches that meet with tangent-plane continuity, such that the trunctet-subshell conditions are guaranteed automatically. This guarantee is not currently available for cubic patches. The general CSG solution thus applies whenever trunctet-subshell conditions are violated, e.g. sometimes for cubic patches or sometimes for patches of any degree that are subject to shape control operations. Manifold solids of arbitrary topology can be represented in our dual representation system. Ensuing CSG constructs are parallel processed on the RayCasting Engine to support a wide range of solid modeling applications, including general sweeping, Minkowski operations, NC machining, and touch-sense probing.

With the widespread use of computers, in the design world, rule-based design methods, which can work in harmony with computer logic and can be easily adapted to the computer environment, have come to the fore. It is possible to analyze the logic of a design made with the rule-based design method. It is even possible to change the design which is placed on the rule base by removing the rules, in the computer environment, or creating new designs with the same design logic. In this paper, a new hybrid model is proposed based on Interval Type-2 Fuzzy Analytic Network Process (IT2 FANP) and Interval Type-2 Fuzzy TOPSIS (IT2 Fuzzy TOPSIS) for the evaluation of store plan alternatives produced with rule-based design method. The IT2 FANP method is used to determine the weight of criteria determined by experts in the selection of store plan alternatives. Then, the IT2 Fuzzy TOPSIS method is used to obtain the ranking of alternatives with Interval Type-2 trapezoidal fuzzy numbers. The originality of the paper comes from the first-time usage of a hybrid approach based on IT2 FANP and IT2 Fuzzy TOPSIS methodology in the prioritizing of store plan alternatives produced with rule-based design method.

This paper developed a quality check system for digital model based on knowledge engineering and explained the frame construction of the check system. The workflow and rules of digital model check were expressed in detail by bringing in knowledge engineering. Digital model quality check process was divided into five steps: system environment check, general data check, entity model check, assembly model check, and engineering drawing check. This Check System will contribute to collecting data from high-qualified models and supporting the product for designing and manufacturing. Finally, a case was employed to demonstrate the efficiency and feasibility of the quality check system for digital models.

The load transfer inside a given structure can be expressed by load paths. Based on the concept of internal stiffness that is independent of stress analysis, the $U$* index is a powerful tool to visualize the load paths by measuring strain energy caused by displacement at the loading point. In this short communication, a scalar index $T$* is introduced as a new expression of internal stiffness to visualize the load paths with a greater precision. The load paths are defined as the streamlines following the decay direction of the internal stiffness. Based on the numerical simulations, $T$* load paths have higher load transfer efficiency compared to $U$* counterparts. The experimental study of an $L$-bracket with stiffeners placed on the main load paths further verifies the effectiveness of the $T$* index for load path analysis. The proposed concept for load path analysis showcases great potential in design evaluation and optimization for load-bearing components from a macroscopic view.

This paper describes a multidisciplinary project that applied the concept of reverse engineering using computer-aided design (CAD) tools to develop a three-dimensional printing (3DP)-based prosthetic socket for transtibial amputees by combining the concepts of patellar tendon-bearing (PTB) socket design principle and total surface-bearing (TSB) socket casting method. Using contemporary tools such as a handheld 3D scanner and an entry-level 3DP machine, together with an in-house prosthetic socket design system and a stump forming device, allowed us to fabricate prosthetic sockets with a consistent quality, and to shorten the learning process time-frame to fabricate them. The results of a case study of two participants demonstrated that the proposed CAD/3DP process of fabrication of transtibial sockets can be easily applied by an unskilled prosthetist to fabricate a socket with the required quality at the first fitting.

The conceptual stage of the design process is characterized by a high degree of uncertainty concerning the design requirements, information and constraints. However, decisions made at this early stage have a significant influence on factors such as costs, performance, reliability, safety and environmental impact of a product. More importantly, a poorly conceived design can never be compensated for in the later stages of design. There is some controversy over the use of computers at this stage of product design. Some researchers feel that providing accuracy during this phase when solutions are imprecise, ill defined, approximate or unknown, accurate calculations impart a false sense of confidence in the validity of the solution. Others feel that maturing computer techniques with richer representations can provide invaluable assistance in specific sub-tasks of this phase. The purpose of this paper is to review advances in computational support for conceptual design from its early days to its current position. For each technique, we follow its progress from its conception to its latest status, pointing out significant variations and trends.

Advances in VLSI technology make it possible to realize systems of very high complexity in a small volume of hardware using integration. In many application fields, it is necessary to implement certain algorithms, or even complete information processing systems, directly in silicon. Application domains which are likely to benefit are in the fields of signal processing and scientific computing.

In this paper, we consider several steps which we believe to be essential in the design path of a special purpose architecture, and we present methodologies for achieving design requirements. These solutions are based on experience gathered in the Parallel VLSI Architecture group of IRISA.