Research PaperNo Access

Parameter Space Exploration for Analog Circuit Design Using Enhanced Bee Colony Algorithm

Subhash Patel

http://orcid.org/0000-0001-6221-8169

Electronics & Communication Department, Indus University, Ahmedabad, Gujarat, India

E-mail Address: subhash.bvm@gmail.com

Corresponding author.

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and

Rajesh A. Thakker

Electronics & Communication Department, Vishwakarma Government Engineering College, Ahmedabad, Gujarat, India

E-mail Address: rathakker2008@gmail.com

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https://doi.org/10.1142/S0218126619501536Cited by:0 (Source: Crossref)

Abstract

In this work, novel swarm optimization algorithm based on the Artificial Bee Colony (ABC) algorithm called Enhanced Artificial Bee Colony (EABC) algorithm is proposed for the design and optimization of the analog CMOS circuits. The new search strategies adopted improve overall performance of the proposed algorithm. The performance of EABC algorithm is compared with other competitive algorithms such as ABC, GABC (G-best Artificial Bee Colony Algorithm) and MABC (Modified Artificial Bee Colony Algorithm) by designing three CMOS circuits; Two-stage operational amplifier, low-voltage bulk driven OTA and second generation low-voltage current conveyor in 0.13 $μ$ m and 0.09 $μ$ m CMOS technologies. The obtained results clearly indicate that the performance of EABC algorithm is better than other mentioned algorithms and it can be an effective approach for the automatic design of the analog CMOS circuits.

This paper was recommended by Regional Editor Emre Salman.

Keywords:

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