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A Low Supply Voltage, Low Line Sensitivity and High PSRR Subthreshold CMOS Voltage Reference

Department of Electronics and Communication Engineering, Thapar Institute of Engineering and Technology, Patiala, Punjab, India

E-mail Address: thakurarvindsingh.90@gmail.com

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Rishikesh Pandey

https://orcid.org/0000-0003-1369-7073

Department of Electronics and Communication Engineering, Thapar Institute of Engineering and Technology, Patiala, Punjab, India

E-mail Address: riship23@gmail.com

Corresponding author.

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, and

Shireesh Kumar Rai

Department of Electronics and Communication Engineering, Thapar Institute of Engineering and Technology, Patiala, Punjab, India

E-mail Address: skumar.rai@thapar.edu

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https://doi.org/10.1142/S0218126621502273Cited by:6 (Source: Crossref)

Abstract

The paper presents a low supply voltage CMOS voltage reference with low line sensitivity and high PSRR. Generally, the reference voltage is obtained using both complementary-to-absolute-temperature (CTAT) current and proportional-to-absolute-temperature (PTAT) current. This technique increases the complexity and area of the reference circuit. To overcome these drawbacks, the temperature compensated reference voltage has been proposed using only CTAT currents. Mostly, the CTAT current generators are simple, power-efficient, and area-efficient as compared to the PTAT current generators. The negative feedback loop has been formed in the proposed design to obtain a supply independent CTAT current and to avoid the use of startup drivers. The proposed circuit has been designed using Cadence virtuoso analog design environment in BSIM3V3 180nm CMOS technology. The simulation results of the proposed circuit show a reference voltage of 312mV with a temperature coefficient (TC) of 38.85ppm/^∘C over a wide temperature range of $- 4 0^{\circ}$ C to 125^∘C with a supply voltage of 0.8V. The line sensitivity is 0.027% $∕ V$ with a supply voltage ranging from 0.8V to 3V. The power supply rejection ratio (PSRR) without using any capacitive filter is observed as $- 80.84$ and $- 71.66$ dB at 100Hz and 100kHz frequency, respectively. The circuit is simple and occupies a chip area of 0.0027mm².

This paper was recommended by Regional Editor Piero Malcovati.

Keywords:

References

1. R. J. Baker, CMOS: Circuit Design, Layout, and Simulation, 4th edn. (Wiley, United States, 2019). Google Scholar
2. L. Wang, C. Zhan, J. Tang, Y. Liu and G. Li, A 0.9-V 33.7-ppm/^∘C 85-nW sub-bandgap voltage reference consisting of subthreshold MOSFETs and single BJT, IEEE Trans. Very Large Scale Integr. VLSI Syst. 26 (2018) 2190–2194. Crossref, Web of Science, Google Scholar
3. A. Thakur, R. Pandey and S. K. Rai, Low temperature coefficient and low line sensitivity subthreshold curvature-compensated voltage reference, Int. J. Circuit Theory Appl. 48 (2020) 1900–1921. Crossref, Web of Science, Google Scholar
4. K. M. Ware, H. S. Lee and C. G. Sodini, A 200-MHz CMOS phase-locked loop with dual phase detectors, IEEE Int. Solid-State Circuits Conf., New York, NY, USA, 1989, pp. 192–193. Crossref, Google Scholar
5. H. Banba et al., A CMOS bandgap reference circuit with sub-1-V operation, IEEE J. Solid-State Circuits 34 (1999) 670–674. Crossref, Web of Science, Google Scholar
6. I. Mehr and L. Singer, A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC, IEEE J. Solid-State Circuits 35 (2000) 318–325. Crossref, Web of Science, Google Scholar
7. B. Razavi, Design of Analog CMOS Integrated Circuits, 1st edn. (McGraw-Hill, Boston, 2003). Google Scholar
8. W.-S. Tam, O.-Y. Wong, C.-W. Kok and H. Wong, Generating sub-1V reference voltages from a resistorless CMOS bandgap reference circuit by using a piecewise curvature temperature compensation technique, Microelectron. Reliab. 50 (2010) 1054–1061. Crossref, Web of Science, Google Scholar
9. X. Li, C. L. Kok, C. D. Wu, L. Siek, D. Zhu, Z. K. Xiao, W. M. Lim and W. L. Goh, A novel voltage reference with an improved folded cascode current mirror Op-Amp dedicated for energy harvesting application, Int. SoC Design Conf. (ISOCC), Busan, Korea (South), 2013, pp. 318–321. Google Scholar
10. G. Souliotis, F. Plessas and S. Vlassis, A high accuracy voltage reference generator, Microelectron. J. 75 (2018) 61–67. Crossref, Web of Science, Google Scholar
11. A. Wang and A. Chandrakasan, A 180-mV subthreshold FFT processor using a minimum energy design methodology, IEEE J. Solid-State Circuits 40 (2005) 310–319. Crossref, Web of Science, Google Scholar
12. S.-C. Luo and L.-Y. Chiou, A sub-200-mV voltage-scalable SRAM with tolerance of access failure by self-activated bitline sensing, IEEE Trans. Circuits Syst. II Exp. Briefs 57 (2010) 440–445. Crossref, Web of Science, Google Scholar
13. Z. Zhu, W. Wei, L. Liu and Y. Yang, A high precision CMOS voltage reference without resistors, J. Circuits Syst. Comput. 21 (2012) 1250019. Link, Web of Science, Google Scholar
14. J. Geng, Y. Zhao and H. Zhao, A high-order curvature-corrected CMOS bandgap voltage reference with constant current technique, Int. J. Circuit Theory Appl. 42 (2014) 43–52. Crossref, Web of Science, Google Scholar
15. J.-D. Chen and C.-K. Ye, Design of a CMOS bandgap reference circuit with a wide temperature range, high precision and low temperature coefficient, J. Circuits Syst. Comput. 23 (2014) 1450107. Link, Web of Science, Google Scholar
16. Q. Duan and J. Roh, A 1.2-V 4.2-ppm/^∘C high-order curvature-compensated CMOS bandgap reference, IEEE Trans. Circuits Syst. I Reg. Papers 62 (2015) 662–670. Google Scholar
17. A. B. D. Andrade, A. Petraglia and C. F. T. Soares, A constrained optimization approach for accurate and area efficient bandgap reference design, Microelectron. J. 65 (2017) 72–77. Crossref, Web of Science, Google Scholar
18. G. Pan, Q. Hua and B. Zhang, A 1.8V 0.918ppm/^∘C CMOS bandgap voltage reference with curvature-compensated, IEICE Electron. Exp. 16 (2019) 1–5. Crossref, Web of Science, Google Scholar
19. Y. Shi et al., A 180nm self-biased bandgap reference with high PSRR enhancement, Nanoscale Res. Lett. 15 (2020) 104. Crossref, Web of Science, Google Scholar
20. J. Ma, Y. Li, C. Zhang and Z. Wang, A 1V ultra-low power high precision CMOS voltage reference, IEEE Conf. Electron Devices and Solid-State Circuits, Tainan, Taiwan, 2007, pp. 847–850. Crossref, Google Scholar
21. G. Giustolisi, G. Palumbo, M. Criscione and F. Cutri, A low-voltage low-power voltage reference based on subthreshold MOSFETs, IEEE J. Solid-State Circuits 38 (2003) 151–154. Crossref, Web of Science, Google Scholar
22. I. Nissinen and J. Kostamovaara, A low voltage CMOS constant current-voltage reference circuit, IEEE Int. Symp. Circuits and Systems, Vol. 1, Vancouver, BC, 2004, pp. I-I. Crossref, Google Scholar
23. M. Mohammed, K. Abugharbieha, M. Abdelfattahb and S. Kawar, Design methodology for MOSFET-based voltage reference circuits implemented in 28nm CMOS technology, AEU Int. J. Electron. Commun. 70 (2016) 568–577. Crossref, Web of Science, Google Scholar
24. S. Koudounas and J. Georgiou, A reduced-area, low-power CMOS bandgap reference circuit, IEEE Int. Symp. Circuits and Systems, New Orleans, LA, 2007, pp. 3832–3835. Crossref, Google Scholar
25. Y. Zeng, Y. Huang, Y. Luo and H.-Z. Tan, An ultra-low-power CMOS voltage reference generator based on body bias technique, Microelectron. J. 44 (2013) 1145–1153. Crossref, Web of Science, Google Scholar
26. A. Parisi, A. Finocchiaro and G. Palmisano, An accurate 1-V threshold voltage reference for ultra-low power applications, Microelectron. J. 63 (2017) 155–159. Crossref, Web of Science, Google Scholar
27. L. H. C. Ferreira, T. C. Pimenta and R. L. Moreno, A CMOS threshold voltage reference source for very-low-voltage applications, Microelectron. J. 39 (2008) 1867–1873. Crossref, Web of Science, Google Scholar
28. H. Luo, Y. Han, R. C. C. Cheung, G. Liang and D. Zhu, Subthreshold CMOS voltage reference circuit with body bias compensation for process variation, IET Circuits Devices Syst. 6 (2012) 198–203. Crossref, Web of Science, Google Scholar
29. Z. Zhou, L. Feng, Y. Ma, Y. Shi, X. Ming and B. Zhang, A resistorless CMOS bandgap reference with low temperature coefficient and high PSRR, Int. J. Electron. 99 (2012) 1427–1438. Crossref, Web of Science, Google Scholar
30. S. F. Ashrafi, S. M. Atarodi and M. Chahardori, New low voltage, high PSRR, CMOS bandgap voltage reference, IEEE Int. SOC Conf., Newport Beach, CA, USA, 2008, pp. 345–348. Crossref, Google Scholar
31. A. Tajalli, M. Chahardori and A. Khodaverdi, An area and power optimization technique for CMOS bandgap voltage references, Analog Integr. Circuits Signal Process. 62 (2010) 131–140. Crossref, Web of Science, Google Scholar
32. M. Chahardori, M. Atarodib and M. Shariflkani, A sub 1V high PSRR CMOS bandgap voltage reference, Microelectron. J. 42 (2011) 1057–1065. Crossref, Web of Science, Google Scholar
33. P. B. Basyurt and D. Y. Aksin, Untrimmed 6.2ppm/^∘C bulk-isolated curvature-corrected bandgap voltage reference, Integration 47 (2014) 30–37. Crossref, Web of Science, Google Scholar
34. L. Liu, W. Huang, J. Mu, Z. Zhu and Y. Yang, A 1.2V, 3.0ppm/^∘C, 3.6 $μ$ A CMOS bandgap reference with novel 3-order curvature compensation, Microelectron. J. 72 (2018) 49–57. Crossref, Web of Science, Google Scholar
35. T. L. Brooks and A. L. Westwick, A low-power differential CMOS bandgap reference, Proc. IEEE Int. Solid-State Circuits Conf. ISSCC 94, San Francisco, CA, USA, 1994, pp. 248–249. Crossref, Google Scholar
36. K. N. Leung and P. K. T. Mok, A sub-1-V 15-ppm/^∘C CMOS bandgap voltage reference without requiring low threshold voltage device, IEEE J. Solid-State Circuits 37 (2002) 526–530. Crossref, Web of Science, Google Scholar
37. A. Boni, Op-amps and startup circuits for CMOS bandgap references with near 1-V supply, IEEE J. Solid-State Circuits 37 (2002) 1339–1343. Crossref, Web of Science, Google Scholar
38. I. Lee, D. Sylvester and D. Blaauw, A subthreshold voltage reference with scalable output voltage for low-power IoT systems, IEEE J. Solid-State Circuits 52 (2017) 1443–1449. Crossref, Web of Science, Google Scholar
39. Y.-H. Lam and W.-H. Ki, CMOS bandgap references with self-biased symmetrically matched current–voltage mirror and extension of sub-1-V design, IEEE Trans. Very Large Scale Integr. VLSI Syst. 18 (2010) 857–865. Crossref, Web of Science, Google Scholar
40. A. Buck, C. Mcdonald, S. Lewis and T. Viswanathan, A CMOS bandgap reference without resistors, IEEE J. Solid-State Circuits 37 (2000) 442–443. Web of Science, Google Scholar
41. H. Xu, Y. Zhang, X. Yan, J. Wang, C. Lu and G. Li, A novel 0.84ppm/^∘C CMOS curvature-compensated bandgap with 1.2V supply voltage, AEU – Int. J. Electron. Commun. 91 (2018) 66–74. Crossref, Web of Science, Google Scholar
42. Z.-K. Zhou, Y. Shi, Y. Wang, N. Li, Z. Xiao, Y. Wang and B. Zhang, A Resistorless high-precision compensated CMOS bandgap voltage reference, IEEE Trans. Circuits Syst. I Reg. Papers 66 (2019) 428–437. Google Scholar
43. Y. Guoyi and Z. Xuecheng, A novel current reference based on subthreshold MOSFETs with high PSRR, Microelectron. J. 39 (2008) 1874–1879. Crossref, Web of Science, Google Scholar
44. L. Wang, C. Zhan, J. Tang, S. Zhao, G. Cai, Y. Liu, Q. Huang and G. Li, Analysis and design of a current-mode bandgap reference with high power supply ripple rejection, Microelectron. J. 68 (2017) 7–13. Crossref, Web of Science, Google Scholar
45. A. Parisi, A. Finocchiaro, G. Papotto and G. Palmisano, Nano-power CMOS voltage reference for RF-powered systems, IEEE Trans. Circuits Syst. II Exp. Briefs 65 (2018) 1425–1429. Crossref, Web of Science, Google Scholar
46. H. Aminzadeh, All-MOS self-powered subthreshold voltage reference with enhanced line regulation, AEU Int. J, Electron, Commun. 122 (2020) 153245. Crossref, Web of Science, Google Scholar
47. H. Aminzadeh, Self-biased nano-power four-transistor current and voltage reference with a single resistor, Electron. Lett. 56 (2020) 282–284. Crossref, Web of Science, Google Scholar
48. H. Aminzadeh and M. M. Valinezhad, 0.7-V supply, 21-nW All-MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS, Microelectron. J. 102 (2020) 104841. Crossref, Web of Science, Google Scholar
49. A. C. D. Oliveira, D. Cordova, H. Klimach and S. Bampi, A 0.12–0.4V, versatile 3-transistor CMOS voltage reference for ultra-low power systems, IEEE Trans. Circuits Syst. I Reg. Papers 65 (2018) 1–10. Google Scholar
50. Z. kun Zhou, P.-S. Zhu, Y. Shi, H.-Y. Wang, Y.-Q. Ma, X.-Z. Xu, L. Tan, X. Ming and B. Zhang, A CMOS voltage reference based on mutual compensation of Vtn and Vtp, IEEE Trans. Circuits Syst. II Express Briefs 59 (2012) 341–345. Crossref, Web of Science, Google Scholar
51. F. Olivera and A. Petraglia, Adjustable output CMOS voltage reference design, IEEE Trans. Circuits Syst. II Regul. (2019). https://doi.org/10.1109/TCSII.2019.2943303 Google Scholar
52. F. Olivera and A. Petraglia, A computer-aided approach for voltage reference circuit design, Analog Integr. Circuits Signal Process. 89 (2016) 511–520. Crossref, Web of Science, Google Scholar
53. I. Lee, D. Sylvester and D. Blaauw, A subthreshold voltage reference with scalable output voltage for low-power IoT systems, IEEE J. Solid-State Circuits 52 (2017) 1443–1449. Crossref, Web of Science, Google Scholar
54. R. Nagulapalli, K. Hayatleh, S. Barker, S. Raparthy, N. Yassine and J. Lidgey, A 0.6V MOS-only voltage reference for biomedical applications with 40ppm/^∘C temperature drift, J. Circuits Syst. Comput. 27 (2018) 1850128. Link, Web of Science, Google Scholar
55. C. J. Liang, C. C. Chung and H. Lin, A low-voltage band-gap reference circuit with second-order analyses, Int. J. Circuit Theory Appl. 39 (2011) 1247–1256. Crossref, Web of Science, Google Scholar
56. R. Nagulapalli, K. Hayatleh, S. Barker, A. A. Tammam, P. Georgiou and F. J. Lidgey, A 0.55V bandgap reference with a 59ppm/^∘C temperature coefficient, J. Circuits Syst. Comput. 28 (2019) 1950120. Link, Web of Science, Google Scholar
57. M. Pan, L. Pang, J. Xie, Y. Han and Q. Xu, A 0.6V 44.6ppm/^∘C subthreshold CMOS voltage reference with wide temperature range and inherent leakage compensation, Integration 72 (2020) 111–122. Crossref, Web of Science, Google Scholar
58. C. M. Andreou and J. Georgiou, A 0.75-V, 4- $μ$ W, 15-ppm/^∘C, 190^∘C temperature range, voltage reference, Int. J. Circuit Theory Appl. 44 (2016) 1029–1038. Crossref, Web of Science, Google Scholar
59. A. Adl, K. El-Sankary and E. El-Masry, A high-order curvature compensation technique for bandgap voltage reference using subthreshold MOSFETs, Int. J. Electron. 97 (2010) 783–796. Crossref, Web of Science, Google Scholar
60. R. J. Baker, CMOS Circuit Design, Layout, and Simulation (Wiley, New Jersey, 2010). Crossref, Google Scholar
61. Y. Lu and B. Zhang, A 1.8-V 0.7ppm/^∘C high order temperature-compensated CMOS current reference, Analog Integr. Circuits Signal Process. 51 (2007) 175–179. Crossref, Web of Science, Google Scholar
62. S. Huang, S. Diao and F. Lin, A 0.7-V, 8.9- $μ$ A compact temperature-compensated CMOS subthreshold voltage reference with high reliability, Analog Integr. Circuits Signal Process. 91 (2017) 53–61. Crossref, Web of Science, Google Scholar
63. L. Magnelli, F. Crupi, P. Corsonello, C. Pace and G. Iannaccone, A 2.6nW, 0.45V temperature compensated subthreshold CMOS voltage reference, IEEE J. Solid-State Circuits 46 (2011) 465–474. Crossref, Web of Science, Google Scholar
64. M. Seok, G. Kim, D. Blaauw and D. Sylvester, A portable 2-transistor picowatt temperature-compensated voltage reference operationg at 0.5V, IEEE J. Solid-State Circuits 47 (2012) 2534–2545. Crossref, Web of Science, Google Scholar
65. M. J. M. Pelgrom, A. C. J. Duinmaijer and A. P. G. Welbers, Matching properties of MOS transistors, IEEE J. Solid-State Circuits 24 (1989) 1433–1439. Crossref, Web of Science, Google Scholar
66. A. C. Oliveira, D. Cordova, H. Klimach and S. Bampi, A 0.12–0.4V, versatile 3-transistor CMOS voltage reference for ultra-low power systems, IEEE Trans. Circuits Syst. I: Reg. Papers 65 (2018) 3790–3799. Google Scholar
67. A. C. Oliveira, D. Cordova, H. Klimach and S. Bampi, Picowatt, 0.45–0.6V self-biased subthreshold CMOS voltage reference, IEEE Trans. Circuits Syst. I: Reg. Papers 64 (2017) 3036–3046. Google Scholar
68. S. Yousefi and M. Jalali, A high-PSRR low-power CMOS voltage reference based on weighted V_GS difference, AEU Int. J. Electron. Commun. 70 (2016) 50–57. Crossref, Web of Science, Google Scholar