In this paper, an evolutionary computation-based optimal design of low power, high gain inductive source degenerated CMOS cascode low noise amplifier (LNA) circuit is presented for 2.4GHz frequency. The main challenge for the design of radio frequency (RF) LNAs at nanometer range is the thermal noise generated in the short-channel MOSFETs. The short-channel effects (SCEs), such as velocity saturation and channel-length modulation, are considered for the design of CMOS LNA. The evolutionary algorithm taken for this work is Moth-Flame Optimization (MFO) algorithm. MFO is utilized for the optimization of noise figure (NF) while satisfying all the other design performance parameters like gain, matching parameters at input/output, power dissipation, linearity, stability. Optimal values of the sizes of the transistors and other design parameters in designing the LNA circuit are also obtained from the MFO algorithm. The CMOS LNA circuit is designed by using MFO-based optimal design parameters in CADENCE software with a standard 0.18 $μ$ $μ$ m CMOS process. The designed LNA shows a gain of 15.28dB, NF of 0.376dB, the power dissipation of 936 $μ$ $μ$ W and IIP3 of $- 4.36$ $- 4.36$ dBm at 2.4GHz. The designed LNA achieves better trade-off which results in an FOM of 42.3mW $^{- 1}$ $^{- 1}$ and may be useful in the receiver module of IEEE 802.15.4 for WLAN applications.

This paper was recommended by Regional Editor Piero Malcovati.

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References

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