Journal of Circuits, Systems and Computers

Due to a continuously increasing power demand of computer–network server equipment, power supply manufacturers are faced with requirements for ac/dc server power supplies with significantly higher power densities. In this paper, circuit technologies and optimization techniques that are suitable for meeting these new power-density requirements are discussed. The focus of the paper is on single-phase, single-output ac/dc power supplies that are used to generate a dc-bus voltage in distributed power systems employed in high-end network servers and telecom systems.

Large-signal analysis of a zero-voltage transition (ZVT) boost converter is presented. The proposed ZVT converter uses an auxiliary circuit with two auxiliary switches both having ZVS. Analysis is used to study the converter behavior for step changes in input voltage and load using MATLAB. SPICE simulation results are presented to verify the theoretical results. It is shown that the main switch and auxiliary switches of the proposed converter maintains soft-switching for large-signal transients.

Point-of-load DC–DC converter requirements and design are increasingly becoming stricter than ever. This is due to the required tight dynamic tolerances allowed for supply voltages and high dynamic performance demand coupled with very high power density. Moreover, as the required converter output voltage becomes smaller, higher voltage step-down ratio is required, which results in smaller switching duty cycle in the nonisolated topologies. Step-down transformer with large turns ratio is used in the isolated topologies to step-down the voltage and keep larger duty cycle. Most of the nonisolated DC–DC topologies are buck-derived and unfortunately work at hard-switching which degrades the efficiency. DC–DC interleaved buck topologies were proposed but are highly sensitive to interleaved phases asymmetry and require high performance current sharing loop. In this paper, a nonisolated multiphase nonisolated half-bridge-buck topology is presented. This topology makes it possible to achieve soft-switching, works at larger switching duty cycle with lower output voltages, and does not require current sharing loop because of the inherent current sharing capability. Moreover, a coupled-inductor current doubler topology is also presented in this paper allowing higher step-down ratio and lower output current ripple. Theoretical analysis and experimental results are presented.

By splitting the output capacitor of a basic boost converter, and combining the resulting capacitors with the main switch in the form of a switched-capacitor circuit, a new step-up structure is realized. Without using a transformer, a high line-to-load DC voltage ratio is obtained. An output filter is added, as usual, in boost converters for getting a free-ripple output. The circuit compares favorably with a quadratic boost converter regarding the count of devices and efficiency, even if it presents a lower DC gain. A DC analysis of the novel converter is presented. Experimental and simulation results confirm the theoretical expectations. By increasing the number of capacitors in the switched-capacitor circuit, higher gains can be obtained. Versatility, high voltage gain and good transient response are the features of the proposed converter.

A novel zero-voltage and zero-current-switch (ZVZCS) full-bridge PWM converter is presented. There are neither additional active switches nor lossy components in the proposed converter to achieve ZVZCS conditions. Moreover, the ZVZCS conditions are achieved by changing the traditional configuration of ZVS-full-bridge without added control: a simple auxiliary circuit is added in the secondary and the center tap of the transformer's secondary is linked to the auxiliary circuit. The secondary rectifier voltage of the converter is clamped to a relative low level, so additional clamp circuit for the secondary rectifier is not necessary.

Using a new improved approach, which concerns the energy input into the secondary rather than the voltage in secondary, a complete small-signal model for the converter is developed through simple calculation.

The operation of the proposed converter is analyzed, some important formulas are deduced. The experimental results of a 1.2-KW prototype prove that the novel converter is successful.

This paper studies the effect of interleaving operation on the bifurcation behavior in a system of parallel-connected dc/dc buck converters. Simulations and analysis are presented for both the cases of interleaving and synchronous operations. The effects of variation of some chosen parameters on the bifurcation behavior of the system are captured. In particular, it is found that variation of the voltage feedback gains leads to period-doubling bifurcation. Interleaving operation will discourage the occurrence of this bifurcation by widening the stable region. It is also observed that variation of output capacitance, load or switching period leads to Neimark–Sacker bifurcation. Interleaving operation will make this bifurcation more likely to occur by narrowing the stable region. In order to show the effect of interleaving operation, bifurcation boundaries of stable period-1 operation in the two cases are located and compared.

Many power converters exhibit chaotic behaviors and bifurcations when conventional feedback corrector are badly tuned or when parameters vary. Time-Delayed Feedback Control (TDFC) can be used to stabilize them using a state feedback delayed by the period of the unstable orbit (UPO) to be stabilized. An obvious advantage of this method is the robustness because it does not require the knowledge of an accurate model but only the period of the target UPO. In this paper, TDFC is applied to a PWM current-programmed single phase inverter concurrently with a proportional corrector in order to avoid bifurcations and chaos and to stabilize the fundamental UPO over a widened range of application. Moreover an improvement of the dynamical performances is realized by defining an adaptive law for the TDFC.

In this paper, a new family of single-stage AC/DC power factor correction converters (S²PFCC), which possesses reduced voltage stress across the storage capacitor and no extra current stress on the power switch, is proposed. The converters are realized by reduced repeated power processing concept in which part of the input power is transferred to the load directly after the first power process. This results in lower storage capacitor voltage than that of previously developed S²PFCCs but maintaining high power factor. In addition, the inherent input current control allows the load current to reduce the input line current automatically when the load becomes light, preventing excessive amount of energy being stored in the storage capacitor. Although the proposed converters employed two power switches, a simple single-loop controller for the proposed S²PFCC to achieve power factor correction (PFC) and tight output regulation is also proposed. Experimental results are reported to verify the operation and concept of the new S²PFCC.

This paper presents a new single-stage single-switched forward converter with magnetic coupled nondissipative snubber, which gives good power factor correction (PFC), low current harmonic distortion, and tight output voltage regulation. The proposed converter features low switch current and voltage stresses, essential for the design of a single-stage power factor correction converter. The prototype shows that the IEC1000-3-2 requirements are met satisfactorily with nearly unity power factor. This proposed converter with magnetic coupled nondissipative snubber is particularly suited for power supply applications with low power level.

A novel switching mode power supply (SMPS) with input/output isolation is presented, which compounds the three-phase power factor corrector (PFC) with a full bridge converter in a single-stage. It solves the problem of over-voltage on the DC link due to pseudo-phase-shifting control (PPSC) mode. Its operating principle and critical parameters are analyzed. Experiment results of an isolated 10 Kw prototype show that the power factor of the system is above 0.99 and the soft-switching mode reduces most of the EMI.

The present paper describes a new arrangement that combines in a single unit a rectifier filter and a converter. The performances are further improved by magnetically coupling the two inductors contained in the circuit. The filter and the converter unit behave as a current source. Simulation and experimental results strengthen the theoretical approach.

The feasibility of producing a modular Active Power Factor Correction (APFC) system was studied analytically and experimentally. It is shown that the novel control scheme that does not need the sensing of the input voltage is highly compatible with the modular, plug-and-play concept. Modularity is achieved by aggregating practically all the electronics in an IC or hybrid unit that may also include the power switch. This unit plus a line rectifier, inductor and bus capacitor are all that it takes to form an APFC system. It is demonstrated that dynamic stability is assured by the proposed inherent robust control method. This plug-and-play solution will greatly simplify and reduce the cost of the design and manufacturing of APFC front ends.

A novel single-switch high-power-factor electronic ballast is designed for compact fluorescent lamps. The circuit configuration is originated from the integration of a buck-boost power-factor-corrector (PFC) and a Class-E load resonant inverter. Design equations are derived based on fundamental approximation and computer analyses are performed to determine circuit parameters. By operating the buck-boost converter at discontinuous conduction mode (DCM), the electronic ballast can achieve nearly unity power factor. With carefully designed circuit parameters, the active power switch can be switched on at relatively low voltage, leading to a high circuit efficiency. A prototype for a 27-W compact fluorescent lamp was built and tested to verify the analytical predictions. Satisfactory performances are obtained from the experimental results.

In this paper a novel class E amplifier with two current sources used to implement high-power-factor electronic ballast for fluorescent lamps is presented and evaluated. The circuit is based on the class E amplifier with two current sources, one of them was implemented using the main input voltage and the other by means of a bulk capacitor charged from the resonant tank of the class E amplifier. This topology presents a high power factor and low current crest factor and only uses one switch with zero voltage switching. Design guidelines are presented and a 300-kHz electronic ballast for a 32-W compact fluorescent lamp was designed and tested.

This paper presents a driver for a HID lamp based on the application of a high frequency current square waveform through the lamp with the goal of avoiding acoustic resonances. The proposed ballast is fed from a 12-V dc input voltage and is intended to be used in systems supplied from nonconventional sources, such as back-up batteries, photovoltaic generators and automotive applications. In order to initiate the discharge in the lamp, a specially-designed igniter supplied from the 12-V dc voltage is used to apply high voltage ignition peaks to the lamp. Experimental results obtained from a laboratory prototype for a 70-W Metal Halide lamp supplied at 30 kHz are also shown to evaluate the possibilities of the proposed topology.