Journal of Circuits, Systems and Computers

Proposed work presents an OR-XNOR-based thermal-aware synthesis approach to reduce peak temperature by eliminating local hotspots within a densely packed integrated circuit. Tremendous increase in package density at sub-nanometer technology leads to high power-density that generates high temperature and creates hotspots. A nonexhaustive meta-heuristic algorithm named nondominated sorting genetic algorithm-II (NSGA-II) has been employed for selecting suitable input polarity of mixed polarity dual Reed–Muller (MPDRM) expansion function to reduce the power-density. A parallel tabular technique is used for input polarity conversion from Product-of-Sum (POS) to MPDRM function. Without performance degradation, the proposed MPDRM approach shows more than 50% improvement in the area and power savings and around 6% peak temperature reduction for the MCNC benchmark circuits than that of earlier literature at the logic level. Algorithmic optimized circuit decompositions are implemented in physical design domain using CADENCE INNOVUS and HotSpot tool and silicon area, power consumption and absolute temperature are reported to validate the proposed technique.

The growing complexity of System-on-a-Chips (SoCs) and rapidly decreasing time-to-market have pushed the design abstraction to the electronic system level in order to increase design productivity. SystemC is a widely used electronic system level modeling language that enables quick prototyping and early verification in the SoC design process. The functional correctness of SystemC designs is often one of the greatest concerns in the SoC design process, since undetected design errors may propagate to low-level implementations or even final silicon products, which are costly to fix. However, SystemC verification is a challenging task due to its complex language features such as object-oriented constructs, hardware-oriented data types and concurrency. A variety of approaches have been proposed for SystemC verification in the past two decades. This work systematically investigates the state-of-the-art SystemC verification approaches by discussing their methodologies, advantages, and limitations, as well as presenting comparison among various approaches.

It has been widely validated that continuous working modes are powerful theories for designing broadband power amplifier (BPA). Theoretically, the conduction angle of all continuous-mode power amplifiers (PAs) is 180^∘ (class-B-biased). However, in practice, these PAs are always biased in class-AB condition. Thus, continuous-mode PAs biased in class-AB condition should be researched. This paper generalizes the theory of hybrid continuous mode (HCM) for implementing broadband power amplifiers. The intrinsic drain current waveform of HCM biased above the pinch-off point (conduction angle is larger than 180^∘) is first derived. Then, the impedance space of the generalized HCM (class-AB-biased) is explored and analyzed. The conclusion is that the generalized HCM possesses a shifted fundamental impedance space along with the enlargement of conduction angle. For validating the proposed theory, a broadband PA working over 1.6–3.0GHz is implemented. Experimental results indicate that the designed BPA achieves a saturation power of 40.3–42.7dBm and a drain efficiency of 64.3–74.4%.

In distribution systems, it is important to guarantee the protected operating state of the power system by the transmission suppliers. To transmit a secure, dependable and economical supply of electric power, long separation bulk power transmission is fundamental. Despite that, the power transfer capacity of the power system is constrained because of the elements like thermal limits, voltage limits and security limits. Crow Search Optimizations (CSO) have been exhibited to be reasonable methodologies in taking care of nonlinear power system issues with Available Transfer Capability (ATC). It is conceivable to improve transmission capabilities. This proposed method based on the IEEE 30-bus system is considered with two distinct areas, and furthermore, the input source is a typical load system with a distributed network. There is a need to control the reactive power flow at the Point of Common Coupling (PCC) between the grids of various voltage levels. To operate a power system securely and furthermore to acquire the benefit of bulk power transfer, ATC evaluation is required. The load gets raised from 50% to 100% in the distribution side by including the thermal power plant (85% and 95% load is included) and with the procured condition, ATC and losses are to be determined. This ATC is determined for verified power supply to the consumers.

In order to solve the problems of low efficiency and long running time caused by the traditional Zernike moment method for convolution calculation of the whole image, this paper combines the canny detection algorithm with the Zernike moment method. First, the canny edge detection algorithm, which combined with the Otsu threshold method, is used to extract the pixel edge of the image. Then an improved Hough transform method is used to fit the geometric edge in the image. Based on this, the Zernike moment method is applied to realize sub-pixel positioning of images. The algorithm improves the deficiencies of direct sub-pixel detection, improving accuracy and reducing running time. To verify the effectiveness of the proposed algorithm, the algorithm is applied to the dimension measurement experiment of T-type guide way. The results clearly show that the algorithm is superior to the traditional algorithm in accuracy.

Direct-Sequence Code Division Multiple Access (DS-CDMA) is a digital method to spread spectrum modulation for digital signal transmission. We propose to detect signal in DS-CDMA communication using the learning mechanism. Initially, the user signals are spread using the respective pseudo-noise (PN) code where the input signal is multiplied with the code which is then modulated using the quadrature phase shift keying (QPSK) modulator. The modulated signal is then transmitted in a 3G/4G channel considering all types of fading. The transmitted signal is received by the antenna array which is performed by demodulation. We propose to adaptively assign the weights by employing Improved Whale Optimized Multi-Layer Perceptron Neural Network (IWMLP-NN)-based learning mechanism. To design IWMLP-NN, Improved Whale Optimization Algorithm is combined with multilayer perceptron neural network. This is used instead of the normal Multiple Signal Classification (MUSIC) and least mean squares (LMS)/root-mean-square (RMS) algorithms used in beam-forming networks. After assigning weight through IWMLP-NN-based learning mechanism, we de-spread to get the original user data. We have compared our proposed technique with the normal techniques with the help of plots of Bit Error Rate (BER) versus Signal-to-Noise Ratio (SNR). We use both the AWGN channel and fading channel for analysis. Experimental results prove that our proposed method achieves better BER performance results even with deep fading.

Providing dynamic resources is based on the virtualization features of the cloud environment. Cloud computing as an emerging technology uses a high availability of services at any time, in any place and independent of the hardware. However, fault tolerance is one of the main problems and challenges in cloud computing. This subject has an important effect on cloud computing, but, as far as we know, there is not a comprehensive and systematic study in this field. Accordingly, in this paper, the existing methods and mechanisms are discussed in different groups, such as proactive and reactive, types of fault detection, etc. Various fault tolerance techniques are provided and discussed. The advantages and disadvantages of these techniques are shown on the basis of the technology that they have used. Generally, the contributions of this research provide a summary of the available challenges associated with fault tolerance, a description of several important fault tolerance methods in the cloud computing and the key regions for the betterment of fault tolerance techniques in the future works. The advantages and disadvantages of the selected articles in each category are also highlighted and their significant challenges are discussed to provide the research lines for further studies.

Approximate arithmetic circuits have been considered as an innovative circuit paradigm with improved performance for error-resilient applications which could tolerant certain loss of accuracy. In this paper, a novel approximate multiplier with a different scheme of partial product reduction is proposed. An analysis of accuracy (measured by error distance, pass rate and accuracy of amplitude) as well as circuit-based design metrics (power, delay and area, etc.) is utilized to assess the performance of the proposed approximate multiplier. Extensive simulation results show that the proposed design achieves a higher accuracy than the other approximate multipliers from the previous works. Moreover, the proposed design has a better performance under comprehensive comparisons taking both accuracy and circuit-related metrics into considerations. In addition, an error detection and correction (EDC) circuit is used to correct the approximate results to accurate results. Compared with the exact Wallace tree multiplier, the proposed approximate multiplier design with the error detection and correction circuit still has up to 15% and 10% saving for power and delay, respectively.

In nonimaging IR seekers, the received target radiation on the IR detector is modulated via a reticle and produces the information signal (IS). The IS contains the tracking error signal (TES), which is proportional with the target position. TES is used in the control and optic section in the missile. The main task is to extract the TES from IS. The accuracy of TES extraction may be affected by several items such as noise from engines. In this paper, we used for the first time this field Square Root Unscented Kalman Filter (SRUKF) and Extended Kalman Filter (EKF) to estimate the TES from the IS for wagon wheel reticle.

Due to the high computational complexity of these algorithms, their execution in real time is not an easy task especially if there is space limitation for hardware. By using the minicomputer, such as Raspberry Pi 3 Model $\mathrm{\text{B}}+$ platform, the task can be done.

The results showed that the SRUKF presented the best phase estimation for TES. The implementation by using Raspberry Pi was in real time because all algorithm executions for one period was less than 5ms, this time in our problem is less than strict timing window.

This paper presents an optimized noise reduction hardware architecture for real electrooculogram (EOG) system. The proposed denoise architecture is developed using differential evolution (DE) algorithm. The algorithm design the filter with fewer sign-power-of-two (SPT) terms to optimize the denoise filter hardware with desired frequency response. The proposed denoise filter architecture with a DE coefficient set uses shift and add approach and is implemented in gate-level Verilog HDL. The real EOG denoise filter’s functionality is checked with Altera DSP Builder and synthesized using Cadence RTL compiler. Both FPGA and ASIC synthesis results are compared with the recently published works. The area and power consumption results show that the proposed filter occupies less area and with low power consumption as compared to the existing architectures.

Random numbers are important parameters for the security of cryptographic applications. In this study, a secure and efficient generator is proposed to generate random numbers. The first part of the generator is a true random number generator that consists of chaotic systems implemented on FPGA. The second part of the generator is a post-processing algorithm used to overcome the problems that emerge from the generator or environmental factors. As the post-processing algorithm, Keccak, the latest standard of hash algorithm, was rearranged and used. Random numbers with the proposed approach meet the security requirements for cryptographic applications. Furthermore, the NIST 800-22 test suite and autocorrelation test are used to ensure the generated numbers have no statistical weakness. The successful test results demonstrate the security of the generated numbers. An important advantage of the proposed generator does not cause any data loss and perform 100% efficiency although data loss can be up to 70% in some post-processing algorithms.

This paper presents an application of the $\mathrm{\Sigma }\mathrm{\Delta }$ modulation technique to the on-chip dynamic test for analog-to-digital converters (ADCs). The required stimulus such as a single- or two-tone signal is encoded into one-bit $\mathrm{\Sigma }\mathrm{\Delta }$ sequence, which is applied to an ADC under test through a driving buffer and a simple low-pass reconstruction filter. By a systematic approach, we select the order and type of a $\mathrm{\Sigma }\mathrm{\Delta }$ modulator and develop a frequency plan suitable for the spectral measurement. In this way, we achieve a high dynamic range suitable for spectral harmonic and intermodulation distortion tests for ADCs. For high frequency measurements (up to the Nyquist frequency), we propose a novel low-pass/band-pass modulation scheme that allows to avoid harmful effects of the low-frequency quantization noise. Also we address the distortion components which originate from the buffer imperfections for a nonreturn-to-zero waveform representing the encoded stimulus. We show that the low-frequency distortion components can be cancelled by using a simple iterative predistortion technique supported by measurements with a DC-calibrated ADC. By correlation between low- and high-frequency components also the high frequency distortions can be largely reduced. The presented techniques are illustrated by simulation results of an ADC under test.

In solar photovoltaic (PV)-based DC microgrid systems, the voltage output of the classical DC–DC converter produces very less voltage as a result of poor voltage gain. Therefore, cascaded DC–DC boost converters are mandatory for boosting the voltage to match the DC microgrid voltage. However, the number of devices utilized in the DC–DC conversion stage becomes higher and leads to more losses. Thereby, it affects the system efficiency and increases the complication of the system and cost. In order to overcome this drawback, a novel double-boost DC–DC converter is proposed to meet the voltage in DC microgrid. Also, this paper discusses the detailed operation of maximum power point (MPP) tracking techniques in the novel double-boost DC–DC converter topology. The fundamental $P$–$V$ and $I$–$V$ characteristics of solar photovoltaic system, operational details of MPP execution and control strategies for double-boost DC/DC converter are described elaborately. The proposed converter operation and power injection into the DC microgrid are verified through the real-time PSCAD simulation and the validation is done through the experiment with hardware module which is indistinguishable with the simulation platform.

Meminductor is a nonlinear two-terminal element with storage energy and memory ability. To date, meminductor element is not available commercially as memristor and memcapacitor are. Therefore, it is of great significance to implement a meminductor emulator for breadboard experiment. In this paper, a flux-controlled floating/grounded meminductor emulator without a memristor is presented. It is built with commercially available off-the-shelf electronic devices. It consists of single operational transconductance amplifier (OTA), single multiplier, two second-generation current conveyors (CCIIs), single current-feedback operational amplifier (CFOA) and single operational amplifier. Using OTA device introduces an additional control parameter besides frequency and amplitude values of applied voltage to control the area of pinched hysteresis loop of meminductor. Mathematical model of proposed emulator circuit is given to describe the behavior of meminductor circuit. The breadboard experiment is performed using CA3080, AD844, AD633J and LM741 for OTA, CCII–CFOA, multiplier and operational amplifier, respectively. Simulation and experimental test results are given to verify the theoretical analyses. Frequency-dependent pinched hysteresis loop is maintained up to 5 kHz. The presented meminductor emulator tends to work as ordinary inductor for higher frequencies.

Question-answering (QA) websites supply a quickly growing source of useful information in numerous areas. These platforms present novel opportunities for online users to supply solutions, they also pose numerous challenges with the ever-growing size of the QA community. QA sites supply platforms for users to cooperate in the form of asking questions or giving answers. Stack Overflow is a massive source of information for both industry and academic practitioners, and its analysis can supply useful insights. Topic modeling of Stack Overflow is very beneficial for pattern discovery and behavior analysis in programming knowledge. In this paper, we propose a framework based on the Latent Dirichlet Allocation (LDA) algorithm and fuzzy rules for question topic mining and recommending highlight latent topics in a community question-answering (CQA) forum of developer community. We consider a real dataset and use 170,091 programmer questions in the R language forum from the Stack Overflow website. Our result shows that LDA topic models via novel fuzzy rules can play an effective role for extracting meaningful concepts and semantic mining in question-answering forums in developer communities.

The recommender system predicts user preferences by mining user historical behavior data. This paper proposes a social recommendation combining trust relationship and distance metric factorization. On the one hand, the recommender system has a cold start problem, which can be effectively alleviated by adding social relations. Simultaneously, to improve the problem of sparse trust matrix, we use the Jaccard similarity coefficient and the Dijkstra algorithm to reconstruct the trust matrix and explore the potential user trust relationship. On the other hand, the traditional matrix factorization algorithm is modeled by the user item potential factor dot product, however, it does not satisfy the triangle inequality property and affects the final recommender effect. The primary motivator behind our approach is to combine the best of both worlds, mitigate the inherent weaknesses of each paradigm. Combining the advantages of the two ideas, it has been demonstrated that our algorithm can enhance recommender performance and improve cold start in recommender systems.

This paper proposes a novel method for person image generation with arbitrary target pose. Given a person image and an arbitrary target pose, our proposed model can synthesize images with the same person but different poses. The Generative Adversarial Networks (GANs) are the major part of the proposed model. Different from the traditional GANs, we add attention mechanism to the generator in order to generate realistic-looking images, we also use content reconstruction with a pretrained VGG16 Net to keep the content consistency between generated images and target images. Furthermore, we test our model on DeepFashion and Market-1501 datasets. The experimental results show that the proposed network performs favorably against state-of-the-art methods.

The one-dimensional Otsu method is an adaptive threshold method. It obtains the optimal threshold for image segmentation by the maximum between-class variance, without considering the minimum within-class variance. As the background of water surface image is mostly uniform, using this feature, the threshold selection tactics adopt the combination of the one-dimensional Otsu method and the uniformity measurement, proposes the threshold segmentation method based on uniformity measurement, and adopts the performance evaluation method based on GT image to compare the segmentation result. Experimental results demonstrate that effectiveness of the improved Otsu method is generally better than the traditional Otsu method, and the other four commonly used threshold segmentation methods for the water surface image, which improves the segmentation accuracy of such images and reduces the segmentation error rate. At the same time, as the water surface image is usually affected by light intensity, water ripple and other factors, this paper also adopts the relevant correction algorithm to further improve the segmentation accuracy.