Journal of Circuits, Systems and Computers

As the demand for low-power and high-speed logic circuits increases, the design of differential flip-flops based on sense-amplifier (SAFF), which have excellent power and speed characteristics, has become more and more popular. Conventional SAFF (Con SAFF) and improved SAFF designs focus more on the improvement of speed and power consumption, but ignore their Single-Event-Upset (SEU) sensitivity. In fact, SAFF is more susceptible to particle impacts due to the small voltage swing required for differential input in the master stage. Based on the SEU vulnerability of SAFF, this paper proposes a novel scheme, namely cross-layer Dual Modular Redundancy (DMR), to improve the robustness of SAFF. That is, unit-level DMR technology is performed in the master stage, while transistor-level stacking technology is used in the slave stage. This scheme can be applied to some current typical SAFF designs, such as Con SAFF, Strollo SAFF, Ahmadi SAFF, Jeong SAFF, etc. Detailed HSPICE simulation results demonstrate that hardened SAFF designs can not only fully tolerate the Single Node Upset of sensitive nodes, but also partially tolerate the Double Node Upset caused by charge sharing. Besides, compared with the conventional DMR hardened scheme, the proposed cross-layer DMR hardened scheme not only has the same fault-tolerant characteristics, but also greatly reduces the delay, area and power consumption.

The state estimation in Multi-Agent Systems (MASs) is a challenging problem. This is due to the fact that (1) controlling nonaffine nonlinear MASs is a difficult task and also (2) the agents in MASs have direct impacts on each other. This paper presents a new distributed Neural Networks (NN) observer for the nonlinear dynamical model of MASs with nonaffine unknown dynamical agents. The proposed scheme uses the Backpropagation learning algorithm to estimate the unknown nonlinear functions of the agents. Compared with the previous studies, which primarily concentrated on the observer design for Multiple Input Multiple Output (MIMO) systems, the proposed method is applied to nonaffine nonlinear MASs. The advantages of this method are the overall stability, the fast convergence of the observer error to zero and the robustness against both uncertainties and disturbances. Nonlinear flexible-joint robots and nonlinear dynamic duffing chaotic systems are simulated to demonstrate the effectiveness and robustness of the proposed method. The proposed method is also compared with the Luenberger observer. The guaranteed stability, better performance in the presence of agents’ uncertainties, robustness against disturbances are the main advantages of the proposed method compared with the traditional observer.

The Internet of Things (IoT) is a series of recording devices, mechanical and automated machines, documents, creatures, or individuals that have one of the user identifiers and the ability to substitute information over a network without requiring human-to-human connections. The IoT technology is used in different applications to transfer information between two or more stations or devices using actuators/sensors. The IoT has many fields of application, including smart home, healthcare, transport and logistics, and industry. Each application gives highlights and important and explicit administrations. This paper provides an overview of IoT applications, discussing their current problems and potential challenges. In addition, it focuses on issues and challenges that arise for future IoT systems including enormous scaling, planning and needs, generating information and big data, strength, frankness, resource management, privacy, and security. The secure data transformation is more problematic in ongoing research. So, this survey presents security attacks and different security mechanisms involved in IoT applications including authentication, encryption, blockchain, and trust management. Blockchain with IoT applications provides good secure data transfer compared to other security mechanisms. So, this survey mainly concentrates on the blockchain with IoT applications and its latest issues. The objective of this paper is to analyze the issues and challenges of IoT applications, eight research topics in existing systems, security attacks and their countermeasures, and different security mechanisms confronting the IoT.

A compact frequency band reconfigurable dual-mode antenna utilizing both Koch fractal geometry and circular complementary split ring resonators (CSRRs) is presented in this paper. The proposed antenna can be electrically switched into both dual- and single-band resonance modes. A Koch curve derivative novel fractal curve is used to design the patch boundary of the antenna. Two optimized circular CSRRs are loaded inside the antenna geometry to achieve double-band resonance. The antenna operates at both 5.1GHz (upper WLAN band) and 9.6GHz ($X$-band) in dual resonance mode and resonates only at 8GHz ($X$-band) in single resonance mode. A properly biased RF-range PIN diode placed at the slotted ground plane reconfigures the antenna in two operating modes by switching into its ON–OFF states. The antenna is fabricated on cost-efficient epoxy (FR-4) substrate consuming the maximum dimension of $0.34\lambda \times 0.32\lambda$ which is much more compact than the conventional rectangular patch antennas designed for similar bands. Stable radiation characteristics with reduced cross-polarization are achieved at all the resonant bands of the antenna. A prototype of the proposed antenna is fabricated and measured. The simulated results are in good agreement with the measured ones.

Improving the operational safety of systems is essentially based on fault detection and isolation algorithms, these algorithms mainly consist in deriving the different kinds of faults while minimizing false alarms, nondetections and delays in fault detection. The choice of robust diagnosis by the bond graph approach (BG) is based on the use of a robust analytical relations redundant (ARR) generation algorithm from linear fractional transformation models (LFT), where the uncertain part of the ARR is used to generate the adaptive residue thresholds. These relationships not only allow the detection and isolation of defects on the various elements of the system, but also the location since the industrial system is modeled element by element.

The BG-LFT modeling and the robust diagnosis of an accelerometer using micro-electromechanical are presented in this paper. The interaction of the various phenomena is taken into account, thanks to the energy properties of the bond graph tool. The residuals and the adaptive thresholds for normal operation and in abnormal operation are determined. The results suggest that the use of the Bond Graph model for normal operation, the evolutions of the residuals converge towards zero, whereas a fault caused by an element (for example, the stiffness springs $k_1$ or $k_2)$ are modeled, respectively, by capacitive elements $C_1$and $C_2$ shows that the residues $r_1$, $r_2$ and $r_3$ become different from zero. These variations explain that these residues are sensitive to these elements, which are confirmed by results presented in Table 2. The analysis of the sensitivity of the residuals to parametric and structural faults is carried out to determine the detectable values of the faults and therefore to monitor the performance of the diagnosis.

We consider the modeling and asymmetry-induced dynamics for a class of chaotic circuits sharing the same feature of an antiparallel diodes pair as the nonlinear component. The simple autonomous jerk circuit of [J. Kengne, Z. T. Njitacke, A. N. Nguomkam, M. T. Fouodji and H. B. Fotsin, Coexistence of multiple attractors and crisis route to chaos in a novel chaotic jerk circuit, Int. J. Bifurcation Chaos Appl. Sci. Eng. 26 (2016) 1650081] is used as the prototype. In contrast to current approaches where the diodes are assumed to be identical (and thus a perfect symmetric circuit), we examine the more realistic situation where the diodes have different electrical properties in spite of unavoidable scattering of parameters. In this case, the nonlinear component formed by the diodes pair displays an asymmetric current–voltage characteristic which induces asymmetry of the whole circuit. The model is described by a continuous-time 3D autonomous system (ODEs) with exponential nonlinearities. We examine the chaos mechanism with respect to system parameters both in the symmetric and asymmetric modes of operation by using bifurcation diagrams and phase space trajectory plots as the main indicators. Period doubling route to chaos, merging crisis, and multiple coexisting (i.e., two, four, or six) mutually symmetric attractors are reported in the symmetric mode of oscillation. In the asymmetric mode, several unusual nonlinear behaviors arise such as coexisting bifurcations, hysteresis, asymmetric double-band chaotic attractor, crisis, and coexisting multiple (i.e., two, three, four, or five) asymmetric attractors for some suitable ranges of parameters. Theoretical analyses and circuit experiments show a very good agreement. The results obtained in this work let us conjecture that chaotic circuits with antiparallel diodes pair are capable of much more complex dynamics than what is reported in the current literature and thus should be reconsidered accordingly in spite of the approach followed in this work.

Images captured in degraded weather conditions often suffer from bad visibility. Pre-existing haze removal methods, the ones that are effective are computationally complex too. In common de-hazing approaches, estimation of atmospheric light is not achieved properly as a consequence, haze is not removed significantly from the sky region. In this paper, an efficient method of haze removal from a single image is introduced. To restore haze-free images comprising of both sky as well as nonsky regions, we developed a linear model to predict atmospheric light and estimated the transmission map using the dark channel prior followed by an application of a guided filter for quick refinement. Several experiments were conducted on a large variety of images, both reference and nonreference, where the proposed image de-hazing algorithm outperforms most of the prevalent algorithms in terms of perceptual visibility of the scene and computational efficiency. The proposed method has been empirically measured through quantitative and qualitative evaluations while retaining structure, edges, and improved color.

In the nano-scale era, chip temperature has gained a lot of importance due to various reasons. Localized high temperatures in certain regions, commonly known as hotspots, directly affect the performance and reliability of the chip. The proposed work concentrates on temperature-driven floorplanning of chips because incorporating cooling techniques may lead to increase in cost. The proposed approach attempts to evenly distribute power dense components across the chip area in order to suppress hotspots and at the same time generate a layout with aspect ratio nearly 1, as is required in the present day floorplanning scenario. The positions of the blocks in the layout are generated using Boolean Satisfiability (SAT). Apart from peak temperature, wirelength being an important cost factor is also taken into consideration. The proposed technique is successful in decreasing the wirelength and peak temperature for large GSRC, MCNC and IBM HB$+$ benchmarks.

Fixed-point multiplication is an important operation that is frequently used in many digital signal processing (DSP) applications. The operation is computationally intense and very often the performance of multiplier determines the overall performance of DSP system. Evidently, a wide range of approaches have been proposed for efficient implementation of fixed-point multipliers on different hardware platforms. In this paper, we use Coordinate Rotation DIgital Computer (CORDIC) algorithm to perform fixed-point multiplication operation. The motivation for our approach is based on the fact that CORDIC is a hardware-efficient algorithm, wherein accuracy can be traded-off for performance. Our implementation targets field programmable gate arrays (FPGAs) and focuses on exploiting the underlying general and specialized fabric to the fullest. Performance comparisons against various traditional and recent approaches show that a substantial improvement is achievable by using CORDIC-based multipliers. We have also implemented a recently proposed convolution architecture using CORDIC-based multipliers. The results show that a proper choice of CORDIC architecture can result in an improvement of performance parameters like resource utilization, throughput and dynamic power. This, however, is achieved in lieu of a small cost in accuracy. Our analysis of an 8-stage CORDIC multiplier reports a mean absolute percentage error (MAPE) of 6.032 — a factor that reduces exponentially with increasing number of stages.

This paper introduces hybrid iterative algorithms that combine Particle Swarm Optimization (PSO) and Simulated Annealing (SA) algorithms for Field Programmable Gate Array (FPGA) placement by considering adaptive inertia weight and local minima avoidance. The algorithms target to optimize the wire-length of the nets, run time and critical path delay in the placement of logic blocks. Using the adaptive inertia weight parameter and local minima avoidance, the hybrid PSO-SA algorithm is modified to Time-varying PSO-SA (TPSO-SA) and Modified PSO-SA (MPSO-SA) algorithm, respectively. These different hybrid PSO-SA algorithms are checked for efficiency by comparing with the Versatile Place and Route (VPR) algorithm of the Verilog to Routing (VTR) tool using Microelectronics Centre of North Carolina (MCNC) benchmark circuits. The hybrid PSO-SA algorithms give 5–37% better results for wire-length cost and 20–58% reduction in runtime compared to the VPR placement algorithm on different benchmark circuits. Critical path delay is also taken into consideration.

Memory circuit elements are of interest due to their use in different fields of science and technology. In this research, a new multi-outputs operational transconductance amplifiers (MO-OTA)-based memcapacitor emulator is proposed. The proposed emulator employs two OTAs, two capacitors, two resistors and an analog multiplier. The memcapacitor emulator circuit has electronically tunability property. Charge value of the memcapacitor can be adjusted by changing the transconductance $g_m$ value with the biasing current of the MO-OTA or frequency value of the input signal. In order to analyze the performance of the proposed circuit, memcapacitor emulator is simulated in 0.18$\mu$m TSMC CMOS process using LTSPICE and the simulation results are demonstrated.

This paper aims to explore and compare the dependence of power amplifier performance parameters on the loaded quality factor of the resonant circuit, the technology node used and the operating frequency for different variants of the class E power amplifier. In spite of the fact that the circuit parameter variations of the basic class E amplifier are present in the literature, there is a lack of comparative analysis with respect to other class E power amplifiers based on diverse tuned load networks. Moreover, the effects of these three parameters are rarely discussed. The comparative analysis helps the designers to narrow down the selection of a power amplifier to be used for a particular application. This study is focused on the use of class E power amplifiers in biomedical implants at the Medical Implant Communication Service band and Industrial Scientific and Medical band. It is observed that the power added efficiency and the power gain have an inverse dependence on the loaded quality factor, frequency and the technology node while the output power depends directly on these parameters.

This paper introduces an efficient and scalable cloud-based privacy preserving model using a new optimal cryptography scheme for anomaly detection in large-scale sensor data. Our proposed privacy preserving model has maintained a better tradeoff between reliability and scalability of the cloud computing resources by means of detecting anomalies from the encrypted data. Conventional data analysis methods have used complex and large numerical computations for the anomaly detection. Also, a single key used by the symmetric key cryptographic scheme to encrypt and decrypt the data has faced large computational complexity because the multiple users can access the original data simultaneously using this single shared secret key. Hence, a classical public key encryption technique called RSA is adopted to perform encryption and decryption of secure data using different key pairs. Furthermore, the random generation of public keys in RSA is controlled in the proposed cloud-based privacy preserving model through optimizing a public key using a new hybrid local pollination-based grey wolf optimizer (LPGWO) algorithm. For ease of convenience, a single private server handling the organization data within a collaborative public cloud data center when requiring the decryption of secure sensor data are allowed to decrypt the optimal secure data using LPGWO-based RSA optimal cryptographic scheme. The data encrypted using an optimal cryptographic scheme are then encouraged to perform data clustering computations in collaborative public servers of cloud platform using Neutrosophic c-Means Clustering (NCM) algorithm. Hence, this NCM algorithm mainly focuses for data partitioning and classification of anomalies. Experimental validation was conducted using four datasets obtained from Intel laboratory having publicly available sensor data. The experimental outcomes have proved the efficiency of the proposed framework in providing data privacy with high anomaly detection accuracy.

In this paper, we propose a system-level optimization approach for mixed-criticality distributed real-time systems with safety and energy considerations. We firstly depict a mixed-criticality distributed task model for real-time applications, in which the safety of the system is influenced by dynamic voltage and frequency scaling (DVFS). Due to the huge complexity of solving the problem optimally, a heuristic algorithm is proposed to approach the system-level optimization through a quasi-static scheduling strategy. The experiments demonstrate the efficiency of the proposed approach, which can obtain energy consumption while guaranteeing the system safety requirements.

A new compact $1\times 4$ microstrip patch antenna array design for future 5G applications is presented in this paper. The proposed antenna array consists of square slot loaded with four radiating patch elements. The corporate feed network has been implemented for the excitation of the array. The feed line is connected to the square slot patch through a quarter-wave transformer matching network. The proposed array is designed on an FR-4 substrate with a dielectric constant of 4.4, thickness of 1.6mm and loss tangent (tan$\delta )$ of 0.02. It has a compact dimension of 9.590$\times$ 17.802$\times 1.6\text{m}{\text{m}}^3$. The proposed structure has been designed and simulated by using commercially available HFSS software. The simulated results (reflection coefficient, gain, efficiency, radiation pattern) are verified through the measurement process to confirm the validity of the design concept. The measurement results are in good agreement with the simulated results. The proposed structure resonates at 38.1GHz with a $-$10dB impedance bandwidth of about 3700MHz (36.5GHz to 40.2GHz). The reflection coefficient at 38.1GHz is $-$34dB, with a maximum gain of 7.81dB. The proposed square slot loaded patch antenna array is very promising for 5G communications at 38GHz band (37–40GHz).

Next generation sequencing technologies have noticeably improved in the last decade. Time and cost of whole genome sequencing are important challenges that must be reduced, opening unprecedented opportunities to various research and development areas. The alignment or mapping of small reads produced by sequencing machines to reference genomes of billions of nucleotides is a fundamental task in this sequencing process. It is computationally highly demanding and has become the bottleneck of the DNA analysis process. This paper proposes hardware acceleration based on FPGA of the Myers bit-parallelized algorithm, appropriately modified to be used in the extend stage of DNA alignment tools. The proposed design can be employed in conjunction with software functions, as it constitutes an extremely fast heterogeneous DNA alignment system. The implementation results show a speedup of up to $110\times$ relative to a sequential implementation only in software. In addition, due to the limited use of FPGA resources and the modular design, multiple modules can be used to completely populate the chip, further increasing the computing speed.

Intensive utilization of Induction Heating (IH) innovations can be seen in numerous areas such as manufacturing industries, domestic or house hold and medicinal applications. The development of high switching frequency switches has encouraged the structure of high frequency inverters which are the key component of IH technology. Controlling the power output in a high frequency inverter for IH application is relatively complicated. This paper focuses on designing and developing a typical series resonance inverter and control it by FPGA-based controller. A MOSFET switch-based DC to AC converter is designed and Zero Voltage Switching (ZVS)-based switching strategy is accomplished to acquire less stress on switching devices and greater conversion efficiency. In this technique, secondary switched capacitor cell was proposed for resonant inverter of high frequency. To optimize the performance of the proposed inverter, the FPGA-based control system is implemented. Higher power density is the greatest advantage of this topology. The experimental and simulation model of the proposed series resonant inverter (SRI) for heating applications is developed and simulated using MATLAB/Simulink software.

Visual object tracking works as a key component for many instrumentation and measurement applications such as UAV systems, optical tracking and measuring systems. This paper investigates how to implement accurate RGB-T tracking by integrating the complementary information from RGB and thermal sources. Inspired by the success of Siamese networks in the RGB tracking field, we design a twofold Siamese network for RGB-T tracking, which is composed of an RGB branch and a thermal branch. Each branch is a Siamese network, which can be utilized to compute similarities between the search image and the exemplar image. The parameters in the RGB branch are kept the same as SiamFC. The thermal branch is initialized with parameter weights of the trained network in SiamFC and fine-tuned with constructed thermal image pairs to better capture the target characteristics in the thermal data. Two criteria are further proposed to measure the confidence degrees of response maps obtained by these two modalities. The final response map is computed by adaptively fusing them according to their confidence degrees. The maximum location on the final response map is identified as the target location, and the target scale is obtained through a simple multi-scale search. Experiments on the recently public benchmark RGB-T234 demonstrate the effectiveness of our proposed method when compared to other state-of-the-art trackers. The high performance of our proposed trakcer makes it easy to be implemented in embedded system.

A novel bipolar photon-controlled generalized memristor model with an avalanche photodiode (APD) passive quenching circuit is presented in this paper. The SPICE model of the circuit is established and its fingerprints are analyzed by the pinched hysteresis loops with different bipolar periodic stimuli. The dynamical characteristics of the proposed circuit model are investigated both theoretically and simulatively. The results verified by Cadence Spectre circuit simulator demonstrate that the proposed circuit model is a simple bipolar photon-controlled generalized memristor. Compared with the previously published memristor models, the biggest innovation of this paper is to propose a bipolar generalized memristor model instead of the traditional model, which can easily form the pinched hysteresis loop. Another highlight is that the generalized memristor model in this paper is controlled by photons while conventional memristors are charge-controlled/flux-controlled. Furthermore, the circuit level models are more stable, more reliable and more resistant to interference than the device level models. The topological structure of the proposed circuit model in this paper is much more simpler.

Cloud computing is an ideal platform for executing bag-of-task (BoT) applications due to its capability of delivering high-quality and pay-per-use computing services. This paper presents a family of genetic algorithm (GA)-based metaheuristics for scheduling the tasks of data-intensive BoT applications on hybrid clouds. The scheduling objective is to minimize the flowtime of BoT applications under a specified budget constraint. We take into account the impact of communication time and communication cost to formulate the optimization model for the data-intensive BoT scheduling problem. By using a task sequence to represent the scheduling solution, the proposed algorithms start with using a low-complexity strategy to generate an initial solution. The generated initial solution is identified as the best chromosome in the initial population of GA framework. We improve the standard crossover operator in GA’s evolutionary procedure by incorporating a probabilistic model. In addition, we design an efficient task dispatching method to evaluate the scheduling quality of each chromosome. Built upon the improved crossover scheme and task dispatching method, the proposed metaheuristic algorithms employ three crossover operators to solve the BoT scheduling problem considered in this work. Extensive experiments are performed to verify the performance of the proposed algorithms in scheduling data-intensive BoT applications.