International Journal of High Speed Electronics and Systems

A GaN based negative differential conductivity diode utilizing transient ballistic transport effects is proposed and large-signal circuit simulations along with preliminary experimental results are presented. The diode is an n⁺-n-n⁺ structure and transport is described by an empirical velocity-field relation which is derived directly from femtosecond pulse-probe measurements available in literature and incorporated into the simulations through curve fitting. Efficient THz generation is predicted as a result of ~2.8 peak-to-valley ratio. Pulsed current-voltage characteristics were measured and N-type dependence was observed.

We present a novel approach to achieve terahertz-range cutoff frequencies and maximum frequencies of operation of GaN based heterostructure field-effect transistors (HFETs) at relatively high drain voltages. Strong short-channel effects limit the frequency of operation and output power in conventional geometry GaN HFETs. In this work, we propose a novel device with two additional independently biased electrodes controlling the electric field and space-charge close to the gate edges. As a result, the effective gate length extension due to short channel effects is diminished and electron velocity in the device channel is increased. Our simulations show that the proposed five-terminal HFET allows achieving f_T=1.28 THz and f_max= 0.815 THz at the drain voltages as high as 12 V. Hence, this device opens up a new approach to designing THz transistor sources.

This paper describes analysis and simulations of Si and III-V Gate-All-Around nanowire MOSFETS assuming ballistic or quasi-ballistic transport. It is found that either channel material can provide the higher saturation current depending on the oxide thickness. For effective oxide thickness above approximately 0.5nm, the higher electron velocity of III-V's outweighs the higher density of states available in the Si device associated with higher effective mass and valley degeneracy and result in higher current for the III-V device. However, materials with higher effective mass and valley degeneracy result in smaller on-resistance in ballistic limit. Depending on the gate oxide capacitance, valley degeneracy may influence the attainable saturation current in a positive or negative way.

The Ballistic Deflection Transistor (BDT) is a novel device that is based upon an electron steering and a ballistic deflection effect. Composed of an InGaAs-InAlAs heterostructure on an InP substrate, this material system provides a large mean free path and high mobility to support ballistic transport at room temperature. The planar nature of the device enables a two step lithography process, as well, implies a very low capacitance design. This transistor is unique in that no doping junction or barrier structure is employed. Rather, the transistor utilizes a two-dimensional electron gas (2DEG) to achieve ballistic electron transport in a gated microstructure, combined with asymmetric geometrical deflection. Motivated by reduced transit times, the structure can be operated such that current never stops flowing, but rather is only directed toward one of two output drain terminals. The BDT is unique in that it possesses both a positive and negative transconductance region. Experimental measurements have indicated that the transconductance of the device increases with applied drain-source voltage. DC measurements of prototype devices have verified small signal voltage gains of over 150, with transconductance values from 45 to 130 mS/mm depending upon geometry and bias. Gate-channel separation is currently 80nm, and allows for higher transconductance through scaling. The six terminal device enables a normally differential mode of operation, and provides two drain outputs. These outputs, depending on gate bias, are either complementary or non-complementary. This facilitates a wide variety of circuit design techniques. Given the ultralow capacitive design, initial estimates of f_t, for the device fabricated with a 430nm gate width, are over a THz.

Two dimensional plasmons in submicron transistors have attracted much attention due to their nature of promoting emission/detection of electromagnetic radiation in the terahertz range. We have recently proposed and fabricated a highly efficient, broadband plasmon-resonant terahertz emitter. The device incorporates doubly interdigitated grating gates and a vertical cavity into a high electron mobility transistor. The device operates in various modes: (1) DC-current-driven self oscillation, (2) CW-laser excited terahertz emission, (3) two-photon injection-locked difference-frequency terahertz emission, and (4) impulsive laser excited terahertz emission. Furthermore, the device can operate in completely different functionalities including ultrahigh-speed intensity modulation for terahertz carrier waves. This paper reviews recent advances on plasma wave devices.

The feasibility of CMOS circuits operating at frequencies in the upper millimeter wave and low sub-millimeter frequency regions has been demonstrated. A 140-GHz fundamental mode VCO in 90-nm CMOS, a 410-GHz push-push VCO in 45-nm CMOS, and a 180-GHz detector circuit in 130-nm CMOS have been demonstrated. With the continued scaling of MOS transistors, 1-THz CMOS circuits will be possible. Though these results are significant, output power of signal generators must be increased and acceptable noise performance of detectors must be achieved in order to demonstrate the applicability of CMOS for implementing practical terahertz systems.

In this paper we report on the characterization of n-Al_0.51Ga_0.49N active regions and the fabrication of ultraviolet LEDs that contain self-assembled, nanometer-scale compositional inhomogeneities (NCI-AlGaN) with emission at ~290 nm. These active regions exhibit reduced integrated photoluminescence intensity and PL lifetime relative to 320 nm NCI-AlGaN active regions that have significantly lower AlN mole fraction, despite having more than an order of magnitude fewer threading dislocations, as measured by transmission electron microscopy. This behavior is attributed to nonradiative recombination associated with the presence of a larger density of point defects in the higher Al content samples. The point defects are ameliorated somewhat by the lower density of NCI AlGaN regions in the higher Al content samples, which leads to a larger concentration of carriers in the NCI and concomitant reduced radiative lifetime that may account for the high observed peak IQE (~ 25%). Prototype flip chip double heterostructure-NCI- ultraviolet light emitting diodes operating at 292 nm have been fabricated that employ a 50% NCI-AlGaN active region.

We investigated transient amplitude and phase response of GaN-on-sapphire SAW delay-line device subjected to pulsed sub-band UV illumination. We correlated these results with photoluminescence measurements in two GaN samples with the same emission spectra but different carrier lifetime. The SAW response measurements showed that under pulse illumination the sample with shorter lifetime exhibited gradual rise in the phase and amplitude change in millisecond range. Under similar conditions, the sample with a longer lifetime responded faster. We attribute this change to the presence of defect related transitions of the photoexcited carriers and their interaction with surface acoustic waves. Our results demonstrate the possibility of characterization of compensated GaN samples by measuring the phase and amplitude variations in the SAW transmission mode under pulsed UV excitation.

A solar blind 4H-SiC single photon avalanche diode (SPAD) is reported. The SPAD with separate absorption and multiplication layers was designed for operation with low dark counts. A thin film optical filter deposited on a sapphire window of the device package provided sensitivity in the wavelength range between 240 and 280 nm with a very high solar photon rejection ratio. An estimated dark current of 0.4 pA (0.75 nA/cm2) at a gain of 1000 was measured on a device with an effective mesa diameter of 260 µm. A single photon detection efficiency of 9% (linear mode) and 9.5% (gated Geiger mode) were achieved at a wavelength of 266 nm for the same device. Corresponding dark count rate and dark count probability were 600 Hz and 4×10^-4.

The performance of implant-free (IF), n-type III-V MOSFETs with an In_0.75Ga_0.25As channel have been evaluated using a 2D finite-element Monte Carlo device simulator. We investigate the device performance of a set of scaled transistors with gate lengths of 30, 20 and 15 nm at a drain bias of 0.5 V to determine whether this novel architecture can deliver the high drain current at low bias conditions required for high-performance CMOS applications.

BAE Systems has developed a high power, high yield 70nm 6" 2-mil PHEMT MMIC process for frequencies up to 100GHz. Utilizing T-gate technology and 2-mil substrates, we have created a millimeter wave technology that produces excellent performance from Ka-band through W-bands. The device DC and RF characteristics have excellent uniformity across the wafer. In this paper, we report the 70nm device fabrication on 6-inch wafers and compare the DC and RF characteristics with its mature 0.1µm counterpart.

This paper reports a successful improvement of the low breakdown voltages in short gate-length metamorphic high electron-mobility transistors. The technical approach includes both the optimization of the epitaxial layer design and the selection of the proper gate recess scheme. By employing a novel epitaxial design (including a high indium composite channel and the double-sided doping) and an asymmetric gate recess, both the off-state and on-state breakdown voltages have been improved for 50-nm high-performance metamorphic high electron-mobility transistors. The results reported herein demonstrate that these devices are excellent candidates for ultra-high-frequency power applications.

Plasma-assisted molecular beam epitaxial growth of Mg-doped GaN and InGaN on a sapphire substrate is investigated in this study. Electrical characteristics of p-type GaN strongly depend on the flux of Mg acceptors and the growth temperature. Only the intermediate range of Mg fluxes (beam equivalent pressures near 1×10^-9T) produce p-type GaN with good electrical properties, and a maximum hole concentration of 3.5 × 10¹⁸ cm^-3 is obtained with a Hall mobility of 2.1 cm²/V·s. Due to the strong surface accumulation of electrons, Hall measurements do not indicate p-type polarity for In fraction beyond 11%. In contrast, hot probe measurements show that p-polarity can be measured for the entire range of Mg-doped In mole fractions. Electroluminescence also indicates p-polarity for Ga-rich mole fractions. In_xGa_1-xNp-n homojunctions are fabricated and tested. All GaN devices show low series resistance (0.03 ohm-cm²) and insignificant parasitic leakage. IV curves of all three InGaN homojunctions show rectifying characteristics under dark conditions and photo-response under outdoor sunlight, indicating the existence of holes in InGaN with up to 40% In content.

We have fabricated, characterized and compared the performance of lateral enhancement-mode GaN MOSFETs on as-grown and RIE-etched surfaces with 900 and 1000°C gate oxide annealing temperatures. Both subthreshold swing and field effect mobility show 1000°C is the optimal annealing temperature for the PECVD gate oxide in our MOSFET process.

AlGaN/GaN heterojunction field effect transistors (HFETs) on sapphire substrates for power-switching applications have been fabricated. Design parameters such as source-gate spacing (L_sg), gate length (L_g), and gate width (W_g) have been varied to check their effects on the device performances. For a gate-drain spacing (L_gd) of 10µm, a specific on-resistance (AR_on) of 1.35mΩ-cm² and off-state breakdown voltage (BV) of 770V was achieved, which is close to the 4-HSiC theoretical limit.

We report on the investigation of lattice matched InAlN/GaN MOS-HEMT structures prepared by thermal oxidation at 800 °C in oxygen atmosphere for two minutes. The gate leakage current was reduced by two orders of magnitude. Pulse measurements showed lag effects similar to what is observed for devices without oxidation, indicating a high quality native oxide. The MOS-HEMT showed no degradation in the small signal characteristics and yielded a power density of 5 W/mm at 30 V drain voltage at 10 GHz, power added efficiency of 42% and F_t and F_max of 42 and 61 GHz respectively, illustrating the capability of such MOS-HEMT to operate at high frequencies.

We review our state-of-the-art GaN-based device technologies for power switching at low frequencies and for future millimeter-wave communication systems. These two applications are emerging in addition to the power amplifiers at microwave frequencies which have been already commercialized for cellular base stations. Technical issues of the power switching GaN device include lowering the fabrication cost, normally-off operation and further increase of the breakdown voltages extracting full potential of GaN-based materials. We establish flat and crack-free epitaxial growth of GaN on Si which can reduce the chip cost. Our novel device structure called Gate Injection Transistor (GIT) achieves normally-off operation with high enough drain current utilizing conductivity modulation. Here we also present the world highest breakdown voltage of 10400V in AlGaN/GaN HFETs. In this paper, we also present high frequency GaN-based devices for millimeter-wave applications. Short-gate MIS-HFETs using in-situ SiN as gate insulators achieve high f_max up to 203GHz. Successful integration of low-loss microstrip lines with via-holes onto sapphire enables compact 3-stage K-band amplifier MMIC of which the small-signal gain is as high as 22dB at 26GHz. The presented devices are promising for the two future emerging applications demonstrating high enough potential of GaN-based transistors.

Undoped AlN/GaN heterostructures, grown on sapphire by molecular beam epitaxy, exhibit very low sheet resistances, ~ 150 Ohm/sq, resulting from the 2-dimensional electron gas situated underneath a 4 nm thin AlN barrier. This extraordinarily low sheet resistance is a result of high carrier mobility and concentration (~ 1200 cm²/Vs and ~ 3.5×10¹³ cm^-2 at room temperature), which is ~ 3 × smaller than that of the conventional AlGaN/GaN heterojunction field effect transistor (HFET) structures. Using a 5 nm SiN_x deposited by plasma enhanced chemical vapor deposition as gate-dielectric, HFETs were fabricated using these all binary AlN/GaN heterostructures and the gate tunneling current was found to be efficiently suppressed. Output current densities of 1.7 A/mm and 2.1 A/mm, intrinsic transconductance of 455 mS/mm and 785 mS/mm, were achieved for 2 µm and 250 nm gate-length devices, respectively. Current gain cut-off frequency f_T of 3.5 GHz and 60 GHz were measured on 2 µm and 250 nm gate-length devices, limited by the high ohmic contact resistance as well as the relatively long gate length in comparison to the electron mean free path under high electric fields.

We have fabricated, characterized and compared the performance of lateral n-channel 4H-SiC MOSFETs on (000-1) oriented substrates, using two different gate oxide processes. These processes include low-temperature deposited oxide and plasma-enhanced CVD oxide. Different MOSFET parameters, such as field-effect mobility, threshold voltage, Hall mobility and inversion sheet carrier concentration has been compared for the two processes.

We have characterized and modeled the integrated diode of a 1.2kV 4H-SiC power MOSFET. We have measured its static and dynamic characteristics up to 200°C and extracted relevant SPICE model parameters. From the extracted turn-on voltage and ideality factors, we conclude that the integral diode is not a pin junction diode, but a unipolar diode.

The U. S. Army Research Laboratory (ARL) is investigating compact, energy-dense electronic components to realize high-power, vehicle-mounted survivability and lethality systems. These applications require switching components that are low in weight and volume, exhibit reliable performance, and are easy to integrate into the vehicles' systems. The devices reported here are 4 mm × 4 mm silicon carbide GTOs rated for 3000 V blocking. These devices were packaged at ARL for high pulse current capability, high voltage protection, and minimum package inductance. The GTOs were switched in a 1-ms half-sine, single-pulse discharge circuit to determine reliable peak current and recovery time (or T_q). The GTOs were repeatedly switched over 300 A peak (3.3 A/cm² and an action of 60 A²s) with a recovery time of 20 µs. The switches were also evaluated for dV/dt immunity up to an instantaneous slope of 3 kV/ µs.

Power electronics in hybrid-electric military ground vehicles require fast fault isolation, and benefit additionally from bi-directional fault isolation. To prevent system damage or failure, maximum fault current interrupt speeds in tens to hundreds of microseconds are necessary. While inherently providing bi-directional fault isolation, mechanical contactors and circuit breakers do not provide adequate actuation speeds, and suffer severe degradation during repeated fault isolation. Instead, it is desired to use a scalable array of solid-state devices as a solid-state circuit breaker (SSCB) having a collectively low conduction loss to provide large current handling capability and fast transition speed for current interruption. Although, both silicon-carbide (SiC) JFET and SiC MOSFET devices having high breakdown voltages and low drain-to-source resistances have been developed, neither device structure alone is capable of reverse blocking at full voltage. Limitations exist for using a dual common-source structure for either device type. Small-scale SSCB experiments were conducted using 0.03 cm² normally-on SiC VJFETs. Based on results of these tests, a normally-on VJFET device modification is made, and a proposed symmetric SiC JFET is considered for this application.