International Journal of High Speed Electronics and Systems

A comprehensive SPICE model is developed for single photon avalanche diodes (SPADs). The model simulates both the static and dynamic behaviors of SPADs. Parameters of the model were extracted form experimental data obtained from SPADs designed and fabricated in a standard 0.5μm CMOS process. In this model, the resistive behavior of the device was modeled with an exponential function. Moreover, the device simulated response to incident optical power stimulation is modeled. Experimentally extracted parameters were incorporated into the model, and simulation results agreed with the experimental data.

We report a transient circuit model of Pt/TiO₂(40nm)/Pt memristor that accurately represents the underlying switching mechanism and can be extended to any other material platforms. The analysis is based on the analytic formulation of dynamical characteristics. The transient circuit model is simulated in Cadence using HSPICE. Rise time and fall times of the 40 nm TiO₂ memristor were calculated to be 11.4 ps and 11.6 ps, respectively. The settling time during ON and OFF switching was determined to be 1.04 ns and 0.78 ns, respectively.

The efficiency droop in GaInN/GaN blue light-emitting diodes (LEDs) usually commences at current density around 10 A/cm² and the efficiency decreases monotonically after the droop onset. GaN-based LEDs suffer seriously, at typical operating current densities (10–100 A/cm²), by the efficiency droop. Efficiency re-climbing is observed in the typical droop regime at cryogenic temperatures below 125K. The “efficiency re-climbing” coincides with a distinct increase in device conductivity, which is mainly attributed to an enhancement in p-type conductivity due to field ionization of acceptors. The “efficiency re-climbing” phenomenon implies an approach of solving efficiency droop by enhancing hole injection by external electric field.

The inclusion of metamorphic buffer layers (MBL) in the design of lattice-mismatched semiconductor heterostructures is important in enhancing reliability and performance of optical and electronic devices. These metamorphic buffer layers usually employ linear grading of composition, and materials including In_xGa_1-xAs and GaAs_1-yP_y have been used. Non-uniform and continuously graded profiles are beneficial for the design of partially-relaxed buffer layers because they reduce the threading dislocation density by allowing the distribution of the misfit dislocations throughout the metamorphic buffer layer, rather than concentrating them at the interface where substrate defects and tangling can pin dislocations or otherwise reduce their mobility as in the case of uniform compositional growth. In this work we considered heterostructures involving a linearly-graded (type A) or step-graded (type B) buffer layer grown on a GaAs (001) substrate. For each structure type we present minimum energy calculations and compare the cases of cation (Group III) and anion (Group V) grading. In addition, we studied the (i) average and surface in-plane strain and (ii) average misfit dislocation density for heterostructures with various thickness and compositional profile. Moreover, we show that differences in the elastic stiffness constants give rise to significantly different behavior in these two commonly-used buffer layer systems.

A surface acoustic wave (SAW) is an acoustic, mechanical wave that propagates on the surface of a piezoelectric crystal. Coupling to any medium that interacts the surface strongly affects the velocity and amplitude of the wave. In a typical surface transversal wave (STW) resonator, an electrical signal is converted at interdigital transducers (IDT’s) into polarized transversal waves travelling parallel to the sensing surface, utilizing the piezoelectric properties of the substrate material. This approach is very sensitive to biological interactions on the sensor surface. Typically, the wave transmitted is confined to the surface of the substrate. Thus, the acoustic energy is concentrated within the guiding layer rather than in the bulk of the piezoelectric material. The sensitivity of the sensor for surface modifications is increased, by the choice of material, and the design of the guiding layer as well as by the structure of the sensor and the transducers. The output signals are transformed in terms of their frequency or phase with respect to the input signals, due to the interaction of the input signal with the fluid contacting the sensitive surface. Surface acoustic wave (SAW) devices hold a promise in providing ultra fast sensing platform. Research focus is on studying methods to characterize conductance, susceptance, viscosity, and other properties of protein samples, like albumin using Two-Port Surface Transverse Wave (STW) resonator devices quickly and inexpensively using nano-liter volume. When a mass is deposited on the electrode the resultant decrease in resonant frequency can detect mass changes at nanogram level. We propose to advance the sensitivity of the characterization by use of quartz Two-Port STW resonator since they can operate at much higher frequency than bulk wave oscillators.

In this paper, we propose a multiplexer design based on use of a twin channel and twin drain spatial wavefunction-switched field-effect transistors (SWSFETs). SWSFET comprises of vertically stacked coupled quantum wells devices, which are the channels, where depending on the gate voltage only one of the channels is in conduction mode. Using SWSFET in multi-channel and single drain configuration operates as a multi-valued logic device. 2:1 and 4:2 multiplexer designs are proposed which are compatible with current CMOS technology and with all SWSFET. Both designs lead to greater than 4X reduction in transistor count. Ngspice simulation of circuits is also presented.

Bulk metallic glasses synthesized at specialized facilities at Yale using magnetron cosputtering are sent to Southern Connecticut State University for elemental characterization. Characterization is done using a Zeiss Sigma VP SEM coupled with an Oxford EDS. Characterization is automated using control software provided by Oxford. Collected data is processed and visualized using computational methods developed internally. Processed data is then organized into a database suitable for web retrieval. This technique allows for the rapid characterization of a combinatorial wafer to be carried out in ~11 hours for a single wafer containing ~600 unique compounds.

Vertical ZnO nanorods (NRs) were grown on flexible plastic substrates at low temperature using hydrothermal synthesis method. An energy scavenging piezoelectric device was constructed using two flexible substrates with the NR sides facing each other providing a maximum open-circuit voltage of 1.4 V (peak). Two sets of three piezoelectric devices connected in series in a half-diode-bridge circuit configuration was demonstrated to turn on a commercial red LED.

ZnO NWs were grown on Si (111) and Al₂O₃ substrates using MOCVD. ZnO (002) NWs on Si were randomly orientated while the NWs grown on sapphire were mostly vertically aligned as evident from scanning electron microscope images. The c-axis lattice constant corresponding to ZnO (002)/Si(111) demonstrated a dominant peak at 34.47°(2θ) attributed to ZnO along (002) with a FHWM of 0.0948°(θ) with corresponding c and a-lattice axes constants of 5.1996Å and 3.2456Å, respectively. The c-axis lattice constant for ZnO/sapphire was estimated to be 5.205Å resulting in an out of plane strain of only 0.03%. Photoluminescence of ZnO nanowires grown on sapphire shows absorption peaks associated to exciton-exciton recombination and native defect such as zinc interstitial. In the case of NWs grown on Si, only exciton to exciton recombination was observed.

In this paper, we are experimentally demonstrating the multi-bit storage of a nonvolatile memory device with cladded quantum dots as the floating gate. These quantum dot nonvolatile memory (QDNVM) devices were fabricated by using standard complementary metal-oxide-semiconductor (CMOS) process. The quantum dots in the floating gate region assembled using site-specific selfassembly (SSA) technique. Quantum mechanical simulations of this device structure are also presented. The experimental results show that the voltage separation between the bits was 0.15V and the voltage pulses required to write these bits were 11.7V and 30V. These devices demonstrated the larger write voltage separation between the bits.

DC circuit model of TiO₂ memristors is developed based on the reported I-V data. The method described can easily be implemented to realize memristor based circuitries that serve different application platforms fabricated using any material combination. The time varying length of conductive filaments inside memristor, responsible for the observed switching mechanism, is implemented as the state variable and the state equations are modified accordingly. Once the device physics is taken into account the circuit model can be further adapted to predict the behavior of memristor with altered dimensions.

A scheme to realize all-optical Boolean logic functions, XOR, AND and NAND operations using binary phase shift keyed (BPSK) signal based on quantum-dot semiconductor optical amplifiers (QD-SOA) has been designed and studied. Nonlinear dynamics including carrier heating and spectral hole-burning are taken into account together with the rate equations. We demonstrate XOR, AND and NAND operations at 250Gb/s using a pair of QD-SOA Mach-Zehnder interferometers. Results show that this scheme is suitable for high speed all-optical Boolean logic operations and can improve the output quality comparing with the system using on-off-keyed (OOK) signal.

Through silicon vias (TSVs) play a critical role in today’s microelectronic technology as they enable fabrication of three-dimensional integrated circuits. Traditionally, copper has been used to fill TSVs. However, copper is prone to electro-migration and as the size of TSVs become smaller, copper resistance increases significantly, thereby reducing its potential for TSV material at nanoscales. A proposed hybrid structure is presented here in which Carbon Nanotube (CNT) bundles are grown vertically inside TSVs and encased with copper. The CNT bundles assists with increasing the strength of the hybrid structure and is likely to enhance the reliability of the package. Thermo-mechanical stress analysis and reliability evaluations is conducted to determine the effect of CNT bundles on stress distribution in the package and their impact on reliability of other critical components such as solder bumps that are used to join the silicon layers. The finite element analysis shows that addition of CNT material to the structure, even in small volume ratios tend to redistribute the stress and refocus it to inside the CNT material rather than interfaces. Interface stresses in low strength material typically cause delamination and failure in the package. Redistribution of stress is likely to enhance the reliability of the TSVs. Additional reliability analysis of the solder joints, shows that CNT additions enhances the number of cycles to failure four times. It is hypothesized that addition of CNTs decreases the local CTE mismatch between the silicon layers and assists in reducing the stress in solder bumps. This hypothesis is proven using finite element simulations.

We have analyzed the strain resolution of x-ray rocking curve profiles from measurements of the peak position and peak width made with finite counting statistics. In this work, we have considered x-ray rocking curves which may be Gaussian or Lorentzian in character and have analyzed the influence of the effective number of counts, full-width-at-half-maximum (FWHM) and the Bragg angle on the resolution. Often experimental resolution values are estimated on the order of 10⁻⁵ whereas this work predicts more sensitive values (10⁻⁹) with smaller FWHM and larger effective counts and Bragg angles.

This paper presents the design and modeling of logic gates using two channel spatial wavefunction switched field-effect transistors (SWSFETs) it is also known as a twin-drain MOSFET. In SWSFETs, the channel between source and drain has two or more quantum wells (QWs) layers separated by a high band gap material between them. The gate voltage controls the charge carrier concentration in the two quantum wells layers and it causes the switching of charge carriers from one channel to other channel of the device. The first part of this paper shows the characteristics of n-channel SWSFET model, the second part provides the circuit topology for the SWSFET inverter and universal gates- NAND, AND, NOR,OR, XOR and XOR. The proposed model is based on integration between Berkeley Short-channel IGFET Model (BSIM) and Analog Behavioral Model (ABM), the model is suitable to investigate the gates configuration and transient analysis at circuit level. The results show that all basic two-input logic gates can be implanted by using n-channel SWSFET only, It covers less area compared with CMOS (Complementary metal–oxide–semiconductor) gates. The NAND-NOR can be performed by three SWSFET, moreover the exclusive-NOR “XNOR” can be done by four SWSFET transistors also AND, OR, XOR gates require two additional SWSFET for inverting.

We have studied supercontinuum generation in a tapered-rib lead-silicate waveguide. The Air-SF57 glass-SiO₂ waveguide is 2 cm long, with a varying etch depth to manage the dispersion profile. Numerical simulations are conducted for input sech² pulses centered at 1.55 μm. Due to continuous modification of the phase matching condition for dispersive wave emission, the proposed waveguide geometry generates broadband output spectrum extending from ~1 μm to ~4.6 μm at −30 dB level. With proper pumping conditions, fully coherent supercontinuum can be obtained.

Co-axial Zn_1−xMg_xO core, ZnO shell structures were grown using metal organic chemical vapor deposition (MOCVD), with Mg mole fractions of 2, 5 and 10%. The co-axial core shell structure, with the respective Mg concentration is verified using scanning electron microscope (SEM), transmission electron microscope (TEM) and energy dispersive spectroscopy (EDS). The response times (ṟise time and fall time) of the devices, after being exposed to methanol, varied with Mg mole fraction at the core, r-0.17s and, f-0.37s & f-0.48s for 2% Mg, r-0.81s and, f-5.98s & f-0.89s for 5% Mg and r-0.33s and f-0.13s for 10% Mg. The sensitivity of the devices at room temperature increased with the increment of Mg mole fraction at the core, 25%, 48% and 50% with Mg concentration of 0.02, 0.05 and 0.1, respectively, under high concentration of methanol. The estimated activation energy, corresponds to doubly charged oxygen vacancy (Vo²⁺).

The spatial wavefunction-switched field-effect transistor (SWSFET) is one of the promising quantum well devices that transfers electrons from one quantum well channel to the other channel based on the applied gate voltage. This eliminates the use of more transistors as we have coupled channels in the same device operating at different threshold voltages. This feature can be exploited in many digital integrated circuits thus reducing the count of transistors which translates to less die area. The simulations of basic sequential circuits like SR latch, D latch and flip flop are presented here using SWSFET based logic gates. The circuit model of a SWSFET was developed using Berkeley short channel IGFET model (BSIM 3).

The design and fabrication of multi-layer amperometric electrochemical glucose sensors is dependent upon the diffusional kinetics of the chemical/biochemical species which contribute to the sensor’s response. Considerable effort has been carried out to coat the working electrode with appropriate glucose flux-limiting membranes which is pertinent for superior in vivo performance, and hence requires a careful understanding of the participating species within the sensor cross-sectional architecture. This contribution reports the computational modeling of Clark’s first generation amperometric glucose sensor coated with an electro-polymerized glucose oxidase (GOx) layer along with a layer of polyurethane (PU) employed to reduce the glucose-influx in order to generate linear operation over the normal physiological glucose range in vivo. The model was programmed using MATLAB and utilizes the finite-difference method for the solution to the enzymatic reaction-based diffusion equations. Additionally, experimental devices were fabricated, tested and compared with the simulated results. The simulation of these devices have been shown to align well with experimentally fabricated devices in terms of amperometric current density. The increase in device linearity with the addition of the outer glucose-flux limiting PU membrane corroborate our experimental findings reported in this study which can be used as a powerful analytical tool in designing high–performance next generation implantable glucose sensors.